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SSCD IIT Kanpur · Basic Analog Building Blocks · 795 videos

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Thumbnail for Lec 39: FSMs in processors: branch predictor FSM to avoid pipeline flush; concluding remarks

Lec 39: FSMs in processors: branch predictor FSM to avoid pipeline flush; concluding remarks

Thumbnail for Lecture 41: Introduction to BJT as an amplifying device

Lecture 41: Introduction to BJT as an amplifying device

Thumbnail for Lecture 42: Critical differences of BJT with MOSFET and design steps to handle them

Lecture 42: Critical differences of BJT with MOSFET and design steps to handle them

Thumbnail for EE698G lec26: Phase-locked loops III

EE698G lec26: Phase-locked loops III

Thumbnail for EE698G lec25: Phase-locked loops II

EE698G lec25: Phase-locked loops II

Thumbnail for EE698G lec24: Phase-locked loops I

EE698G lec24: Phase-locked loops I

Thumbnail for Lec 38: Mealy FSM design: Sequence detectors, counting odd/even

Lec 38: Mealy FSM design: Sequence detectors, counting odd/even

Thumbnail for Lec 37: Finite state machine (FSM) design example: Synchronous counters

Lec 37: Finite state machine (FSM) design example: Synchronous counters

Thumbnail for Lecture 39: Poles in diff-pair and relating UGB of loop gain to -3dB bandwidth of the closed loop

Lecture 39: Poles in diff-pair and relating UGB of loop gain to -3dB bandwidth of the closed loop

Thumbnail for Lecture 38: Capacitances in a MOSFET and its effects on feedback loop

Lecture 38: Capacitances in a MOSFET and its effects on feedback loop

Thumbnail for Lecture 37: Analysis of diffamp by splitting inputs into differential and common mode

Lecture 37: Analysis of diffamp by splitting inputs into differential and common mode

Thumbnail for Lec 36: Finite state machines (FSM): Practice problem discussion

Lec 36: Finite state machines (FSM): Practice problem discussion

Thumbnail for EE698G lec23: Oscillators-IV (LC oscillators)

EE698G lec23: Oscillators-IV (LC oscillators)

Thumbnail for Lec 35: Designing asynchronous/ripple-carry counters

Lec 35: Designing asynchronous/ripple-carry counters

Thumbnail for Lecture 36: Differential amplifier with a current mirror load

Lecture 36: Differential amplifier with a current mirror load

Thumbnail for Lecture 35: Norton equivalent of a differential amp contd..

Lecture 35: Norton equivalent of a differential amp contd..

Thumbnail for EE698G lec22: Oscillators-III (LC oscillators)

EE698G lec22: Oscillators-III (LC oscillators)

Thumbnail for Lec 34: Example calculation: Finding state transition graphs & output sequence; Intro to counters

Lec 34: Example calculation: Finding state transition graphs & output sequence; Intro to counters

Thumbnail for Lec 33: Finite state machine (FSM) Analyzing an FSM: state transition table & state transition graph

Lec 33: Finite state machine (FSM) Analyzing an FSM: state transition table & state transition graph

Thumbnail for EE698G lec21: Oscillators-II

EE698G lec21: Oscillators-II

Thumbnail for EE698G lec20: Phase noise- III, Introduction to oscillators

EE698G lec20: Phase noise- III, Introduction to oscillators

Thumbnail for Lecture 34: Norton equivalent of difference amplifier

Lecture 34: Norton equivalent of difference amplifier

Thumbnail for Lecture 32: Using negative feedback to obtain precise gain.

Lecture 32: Using negative feedback to obtain precise gain.

Thumbnail for Lecture 33: Using source following to prevent loading while designing negative feedback loop

Lecture 33: Using source following to prevent loading while designing negative feedback loop

Thumbnail for Lec 32: The D flip-flop & the JK flip-flop

Lec 32: The D flip-flop & the JK flip-flop

Thumbnail for Lec 31: JK latch, T latch and D latch

Lec 31: JK latch, T latch and D latch

Thumbnail for Lec 30: The Set-Reset (SR) latch

Lec 30: The Set-Reset (SR) latch

Thumbnail for Lec 29: Mux (recap); Decoders for realizing logic function; Building a ROM using decoders & OR gates

Lec 29: Mux (recap); Decoders for realizing logic function; Building a ROM using decoders & OR gates

Thumbnail for Lec 28: Four-variable K-Map; Multiplexers to realize a logic function

Lec 28: Four-variable K-Map; Multiplexers to realize a logic function

Thumbnail for Lecture 30: Introducing PMOS transistor to increase the incremental output resistance in a CS amp.

Lecture 30: Introducing PMOS transistor to increase the incremental output resistance in a CS amp.

Thumbnail for Lecture 31: Converting an NMOS based network to a PMOS based network

Lecture 31: Converting an NMOS based network to a PMOS based network

Thumbnail for Lecture 29: Using PMOS transistor to increase gain of the NMOS common source amplifier

Lecture 29: Using PMOS transistor to increase gain of the NMOS common source amplifier

Thumbnail for Lecture 28: Discussion on cascode (common gate) configuration

Lecture 28: Discussion on cascode (common gate) configuration

Thumbnail for Lecture 27: Introduction to cascode configuration

Lecture 27: Introduction to cascode configuration

Thumbnail for EE698G lec19: Phase noise, jitter - II

EE698G lec19: Phase noise, jitter - II

Thumbnail for Lec 27: Karnaugh map (K-map) for logic minimization

Lec 27: Karnaugh map (K-map) for logic minimization

Thumbnail for Lecture 26: Introduction to channel length modulation and its implications

Lecture 26: Introduction to channel length modulation and its implications

Thumbnail for Lecture 25: Discussion constant current source biasing contd..

Lecture 25: Discussion constant current source biasing contd..

Thumbnail for Lecture 24: Biasing a transistor with a current source at drain and feedback at source

Lecture 24: Biasing a transistor with a current source at drain and feedback at source

Thumbnail for Lec 26: Logic realization using SOP & POS forms; Logic minimization using boolean algebra

Lec 26: Logic realization using SOP & POS forms; Logic minimization using boolean algebra

Thumbnail for Lec 25: Logic gates; NOT gate with switches & transistors; Voltage transfer characteristic (VTC)

Lec 25: Logic gates; NOT gate with switches & transistors; Voltage transfer characteristic (VTC)

Thumbnail for Lec 24: Understanding 2s complement; 2s complement arithmetic

Lec 24: Understanding 2s complement; 2s complement arithmetic

$Thumbnail for Lec 23(1): Conversion between number systems (integer & fractional parts)$

Lec 23(1): Conversion between number systems (integer & fractional parts)

Thumbnail for Lec 23(2): Deriving the idea of 10s complement

Lec 23(2): Deriving the idea of 10s complement

Thumbnail for EE698G lec16: Discrete-time small-signal phase-domain model for the DLL

EE698G lec16: Discrete-time small-signal phase-domain model for the DLL

Thumbnail for EE698G lec18: Phase noise, jitter - I

EE698G lec18: Phase noise, jitter - I

Thumbnail for EE698G lec17: DLL applications, introduction to noise

EE698G lec17: DLL applications, introduction to noise

Thumbnail for Lecture 22: Constant current bias by applying current source/sink to the source of the transistor

Lecture 22: Constant current bias by applying current source/sink to the source of the transistor

Thumbnail for Lecture 23: CS amplifier with current source at the source; Introducing the source follower.

Lecture 23: CS amplifier with current source at the source; Introducing the source follower.

Thumbnail for Lecture 20: Biasing a transistor with constant current source

Lecture 20: Biasing a transistor with constant current source

Thumbnail for Lecture 21: Biasing a transistor using a current source contd..

Lecture 21: Biasing a transistor using a current source contd..

Thumbnail for Lec 22: Positional number systems: Binary, Octal, Hexadecimal; Noise tolerance in binary digital sig

Lec 22: Positional number systems: Binary, Octal, Hexadecimal; Noise tolerance in binary digital sig

Thumbnail for EE698G lec15: DLL transfer functions

EE698G lec15: DLL transfer functions

Thumbnail for EE698G lec14: Small-signal phase domain model of a DLL

EE698G lec14: Small-signal phase domain model of a DLL

Thumbnail for EE698G 2026 lec13(2): Modelling the DLL for analysis

EE698G 2026 lec13(2): Modelling the DLL for analysis

Thumbnail for EE698G lec13(1): Mismatches in charge pump, VCDL

EE698G lec13(1): Mismatches in charge pump, VCDL

Thumbnail for Lec 21: Opamp-based RC low-pass filter; Opamp as comparator; Need for hysteresis; Schmitt trigger

Lec 21: Opamp-based RC low-pass filter; Opamp as comparator; Need for hysteresis; Schmitt trigger

Thumbnail for Lec 20: Opamp based sensor interface circuits example; Opamp circuits with capacitors

Lec 20: Opamp based sensor interface circuits example; Opamp circuits with capacitors

Thumbnail for Lec 19: Finding opamp signs for negative feedback; Using voltage buffer & inverting amplifier

Lec 19: Finding opamp signs for negative feedback; Using voltage buffer & inverting amplifier

Thumbnail for Lecture 19: Relating time-constant to 3dB frequencies in Bode plots

Lecture 19: Relating time-constant to 3dB frequencies in Bode plots

Thumbnail for Lecture 18: Using a capacitor to help replace multiple voltage sources for biasing

Lecture 18: Using a capacitor to help replace multiple voltage sources for biasing

Thumbnail for Lec 18: Examples of negative feedback: Introducing opamp; Non-inverting amplifier using opamp

Lec 18: Examples of negative feedback: Introducing opamp; Non-inverting amplifier using opamp

Thumbnail for Lec 16: Phasor representation; Thevenin's theorem with capacitors & inductors; Intro to AC power

Lec 16: Phasor representation; Thevenin's theorem with capacitors & inductors; Intro to AC power

Thumbnail for Lec 15: 2nd order circuits: Series RLC: Resonance, bandwidth, oscillations

Lec 15: 2nd order circuits: Series RLC: Resonance, bandwidth, oscillations

Thumbnail for Lec 14: Bode plot: Bode approximation for the magnitude plot

Lec 14: Bode plot: Bode approximation for the magnitude plot

Thumbnail for Lec 13: Low-pass filter example demo; Intro to Lissajous figures

Lec 13: Low-pass filter example demo; Intro to Lissajous figures

Thumbnail for EE698G lec12: Charge pump implementation - II

EE698G lec12: Charge pump implementation - II

Thumbnail for EE698G lec11: Static phase offset in DLL, charge pump implementation-I

EE698G lec11: Static phase offset in DLL, charge pump implementation-I

Thumbnail for Lecture 17: Max achievable gain in a resistively loaded CS amplifier

Lecture 17: Max achievable gain in a resistively loaded CS amplifier

Thumbnail for Lecture 16: Estimating swing limits of a sinusoidal input signal when applied to a CS stage

Lecture 16: Estimating swing limits of a sinusoidal input signal when applied to a CS stage

Thumbnail for Lecture 15: Intro to common-source amplifier

Lecture 15: Intro to common-source amplifier

Thumbnail for EE698G lec10: Locking non-idealities in a DLL

EE698G lec10: Locking non-idealities in a DLL

Thumbnail for Lec 12: Impedance & frequency response; 1st-order RC & RL circuits as filters

Lec 12: Impedance & frequency response; 1st-order RC & RL circuits as filters

Thumbnail for Lec 11(2): Sinusoidal steady-state response of first-order circuits

Lec 11(2): Sinusoidal steady-state response of first-order circuits

Thumbnail for Lec 11(1): First-order RL circuits; Example calculations

Lec 11(1): First-order RL circuits; Example calculations

Thumbnail for EE698G lec9: Locking in a DLL

EE698G lec9: Locking in a DLL

Thumbnail for Lecture 14: Relating I-V char of a MOSFET (in saturation) to two-port y-parameter model.

Lecture 14: Relating I-V char of a MOSFET (in saturation) to two-port y-parameter model.

Thumbnail for Lecture 13: Relating I-V char of a MOSFET (in linear region) to the y-parameters of a two port

Lecture 13: Relating I-V char of a MOSFET (in linear region) to the y-parameters of a two port

Thumbnail for Lecture 12: Intro to I-V char of a MOSFET

Lecture 12: Intro to I-V char of a MOSFET

Thumbnail for EE698G lec8: Phase detectors - III, charge pump

EE698G lec8: Phase detectors - III, charge pump

Thumbnail for Lecture 10: Visualising mechanical ways of creating an amplifier

Lecture 10: Visualising mechanical ways of creating an amplifier

Thumbnail for Lecture 9: Desirable I-V char of a 2-port-network for amplification (Frozen video after 15:00)

Lecture 9: Desirable I-V char of a 2-port-network for amplification (Frozen video after 15:00)

Thumbnail for Lecture 11: Introduction of MOS structure to control current through a third-terminal

Lecture 11: Introduction of MOS structure to control current through a third-terminal

Thumbnail for Lec 10: RC circuits with two capacitors: Finding initial value, final value, time constant: examples

Lec 10: RC circuits with two capacitors: Finding initial value, final value, time constant: examples

Thumbnail for EE698G lec7: Phase detectors - II

EE698G lec7: Phase detectors - II

Thumbnail for Lec 9: First-order RC circuits: Natural response & forced response

Lec 9: First-order RC circuits: Natural response & forced response

Thumbnail for Lec 8: Capacitors: RC circuits; Can a capacitor voltage change instantly? Capacitor blocks DC?

Lec 8: Capacitors: RC circuits; Can a capacitor voltage change instantly? Capacitor blocks DC?

Thumbnail for Lec 7: Source transformation; Thevenin & Norton theorem

Lec 7: Source transformation; Thevenin & Norton theorem

Thumbnail for Lec 6: Superposition principle in linear circuits

Lec 6: Superposition principle in linear circuits

Thumbnail for EE698G lec6: Phase detectors - I

EE698G lec6: Phase detectors - I

Thumbnail for EE698G lec5: Voltage-controlled delay lines - II

EE698G lec5: Voltage-controlled delay lines - II

Thumbnail for EE698G lec4: Introduction to delay-locked loop, VCDL

EE698G lec4: Introduction to delay-locked loop, VCDL

Thumbnail for Lec 5: Current division; Voltage/current sources in series & parallel; Introducing dependent sources

Lec 5: Current division; Voltage/current sources in series & parallel; Introducing dependent sources

Thumbnail for Lec4(2): Brief on oscilloscope trigger settings

Lec4(2): Brief on oscilloscope trigger settings

Thumbnail for Lec 4: Tricks to solve circuits fast: series & parallel connections; Voltage divider

Lec 4: Tricks to solve circuits fast: series & parallel connections; Voltage divider

Thumbnail for Lec 3: Nodal analysis with voltage sources; Using supernode; Mesh analysis using KVL

Lec 3: Nodal analysis with voltage sources; Using supernode; Mesh analysis using KVL

Thumbnail for Lecture 8: Incremental two-port Y-parameters and their usage in understanding controlled sources

Lecture 8: Incremental two-port Y-parameters and their usage in understanding controlled sources

Thumbnail for Lecture 7: Finding incremental resistance and introduction to two-ports (incomplete recording)

Lecture 7: Finding incremental resistance and introduction to two-ports (incomplete recording)

Thumbnail for Lecture 6: Combining incremental response with the quiescent response

Lecture 6: Combining incremental response with the quiescent response

Thumbnail for Lecture 5: Linearizing non-linear elements in a network

Lecture 5: Linearizing non-linear elements in a network

Thumbnail for EE698G lec3: TDC, PVT variation, stabilizing the delay

EE698G lec3: TDC, PVT variation, stabilizing the delay

Thumbnail for Lec 2(2): Kirchhoff's current law (KCL) & Nodal analysis

Lec 2(2): Kirchhoff's current law (KCL) & Nodal analysis

Thumbnail for Lec 2: Power dissipation; Recap of resistor, inductor & capacitor; Are capacitors active devices?

Lec 2: Power dissipation; Recap of resistor, inductor & capacitor; Are capacitors active devices?

Thumbnail for Lec 1: Why electronics? Defining energy, power; voltage & current sources; active vs passive devices

Lec 1: Why electronics? Defining energy, power; voltage & current sources; active vs passive devices

Thumbnail for Lecture 3: Need for non-linearity to get power amplification

Lecture 3: Need for non-linearity to get power amplification

Thumbnail for Lecture 2: Why do we need a voltage controlled voltage source?

Lecture 2: Why do we need a voltage controlled voltage source?

Thumbnail for Lecture 4: Linearizing a non-linear circuit

Lecture 4: Linearizing a non-linear circuit

Thumbnail for Lecture 1: Consequences of driving a low-impedance load

Lecture 1: Consequences of driving a low-impedance load

Thumbnail for EE698G lec1(4): True time delay vs delaying the edges

EE698G lec1(4): True time delay vs delaying the edges

Thumbnail for EE698G lec1(3): Relationship between phase and delay

EE698G lec1(3): Relationship between phase and delay

Thumbnail for EE698G lec1(2): Relationship between phase and frequency

EE698G lec1(2): Relationship between phase and frequency

Thumbnail for EE698G lec1: Introduction - clock/delay requirements in IC design

EE698G lec1: Introduction - clock/delay requirements in IC design

Thumbnail for Chip design at SSCD IITK

Chip design at SSCD IITK

Thumbnail for EE370 lec39(2): EE370 done! What next?

EE370 lec39(2): EE370 done! What next?

Thumbnail for EE370 lec39(1): Carry select adder

EE370 lec39(1): Carry select adder

Thumbnail for Lecture 25: Impedance and admittance in LPTV systems - Concluding remarks

Lecture 25: Impedance and admittance in LPTV systems - Concluding remarks

Thumbnail for EE370 lec38: Carry bypass adder

EE370 lec38: Carry bypass adder

Thumbnail for EE370 lec37: Ripple carry adder

EE370 lec37: Ripple carry adder

Thumbnail for EE370 lec36(2): Introduction to adder circuits

EE370 lec36(2): Introduction to adder circuits

Thumbnail for EE370 lec36(1): Timing parameters of a flipflop built using TGs and bistable elements

EE370 lec36(1): Timing parameters of a flipflop built using TGs and bistable elements

Thumbnail for Lec 26(2): Analog layout basics; what to do post schematic design? Concluding remarks

Lec 26(2): Analog layout basics; what to do post schematic design? Concluding remarks

Thumbnail for Lec 26(1): Course summary

Lec 26(1): Course summary

Thumbnail for EE370 lec35: Latch implementation using transmission gates; Bistable element

EE370 lec35: Latch implementation using transmission gates; Bistable element

Thumbnail for Lecture 23: Inter-reciprocity in LPTV network - Integrated noise in switched RC circuit

Lecture 23: Inter-reciprocity in LPTV network - Integrated noise in switched RC circuit

Thumbnail for Lecture 22: N-path operation contd..

Lecture 22: N-path operation contd..

Thumbnail for EE370 lec34(2): Latches and flip-flops

EE370 lec34(2): Latches and flip-flops

Thumbnail for EE370 lec34(1): Pass transistor logic-II

EE370 lec34(1): Pass transistor logic-II

Thumbnail for Lec 25: Noise in fully-diff amp; Noise-power trade-off in analog circuits; Noise scaling & FoM

Lec 25: Noise in fully-diff amp; Noise-power trade-off in analog circuits; Noise scaling & FoM

Thumbnail for Lecture 20: Finding envelope of an LPTV network with large time-constant using sinusoidal inputs

Lecture 20: Finding envelope of an LPTV network with large time-constant using sinusoidal inputs

Thumbnail for EE IITK PhD Admissions 2026: Your Research Journey Begins! #sscd #iitk #icdesign

EE IITK PhD Admissions 2026: Your Research Journey Begins! #sscd #iitk #icdesign

Thumbnail for Chip talk @ SSCD: Aasif introduces his work on wideband delay-lines

Chip talk @ SSCD: Aasif introduces his work on wideband delay-lines

Thumbnail for EE370 lec33(3): Pass transistor logic

EE370 lec33(3): Pass transistor logic

Thumbnail for EE370 lec33(2): Deriving PUN from PDN using graphs

EE370 lec33(2): Deriving PUN from PDN using graphs

Thumbnail for EE370 lec33(1): Fall propagation delay in N-input NAND gate

EE370 lec33(1): Fall propagation delay in N-input NAND gate

Thumbnail for EE370 lec32: Propagation and contamination delays in a combinational circuit

EE370 lec32: Propagation and contamination delays in a combinational circuit

Thumbnail for Lecture 21: Introduction to N-path filters

Lecture 21: Introduction to N-path filters

Thumbnail for Lecture 16: Analysis of an LTV system through the example of an RC network

Lecture 16: Analysis of an LTV system through the example of an RC network

Thumbnail for EE370 lec31: Sizing transistors in combinational circuits

EE370 lec31: Sizing transistors in combinational circuits

Thumbnail for Lec 24: Input referred noise voltage & current calculations; Noise & Offset in 5-T OTA

Lec 24: Input referred noise voltage & current calculations; Noise & Offset in 5-T OTA

Thumbnail for Lecture 19: Switched RC frequency response contd..

Lecture 19: Switched RC frequency response contd..

Thumbnail for Lec 22(2): Process variation & random mismatch; Pelgrom's model

Lec 22(2): Process variation & random mismatch; Pelgrom's model

Thumbnail for Lec 22(1):Two-stage feedforward OTA with current re-use; Common-mode rejection due to CMFB

Lec 22(1):Two-stage feedforward OTA with current re-use; Common-mode rejection due to CMFB

Thumbnail for EE370 lec30: Overview of CMOS inverter layout, combinational logic

EE370 lec30: Overview of CMOS inverter layout, combinational logic

Thumbnail for Lecture 18: Analysis of an LPTV network through the example of a switched RC circuit.

Lecture 18: Analysis of an LPTV network through the example of a switched RC circuit.

Thumbnail for EE370 lec29: Sizing an inverter chain for optimal delay

EE370 lec29: Sizing an inverter chain for optimal delay

Thumbnail for EE370 lec28: Trade-offs in optimizing power consumption in a CMOS inverter

EE370 lec28: Trade-offs in optimizing power consumption in a CMOS inverter

Thumbnail for Lec 21: Common-mode feedback (CMFB) choices & design considerations; 2-stage Miller OTA with CMFB

Lec 21: Common-mode feedback (CMFB) choices & design considerations; 2-stage Miller OTA with CMFB

Thumbnail for Cadence demo: Systematic design of a two-stage Miller OTA & tackling the gate parasitic capacitance

Cadence demo: Systematic design of a two-stage Miller OTA & tackling the gate parasitic capacitance

Thumbnail for EE370 lec27: Power consumption in CMOS inverters

EE370 lec27: Power consumption in CMOS inverters

Thumbnail for Lec 20(2): Pseudo diff. vs. fully diff. ckts; Need for common-mode feedback in fully diff. ckts.

Lec 20(2): Pseudo diff. vs. fully diff. ckts; Need for common-mode feedback in fully diff. ckts.

Thumbnail for Lec 20(1): Nested Miller & Feedforward compensation

Lec 20(1): Nested Miller & Feedforward compensation

Thumbnail for EE370 lec26(2): Elmore Delay

EE370 lec26(2): Elmore Delay

Thumbnail for EE370 lec26(1): Delays in a CMOS inverter (III)

EE370 lec26(1): Delays in a CMOS inverter (III)

Thumbnail for Lecture 15: Impulse response in time-varying network

Lecture 15: Impulse response in time-varying network

Thumbnail for Lecture 13: Distortion analysis - current injection method

Lecture 13: Distortion analysis - current injection method

Thumbnail for Lec 19(2): Two-stage feedforward compensation

Lec 19(2): Two-stage feedforward compensation

Thumbnail for Lec 19(1): Miller compensation: Eliminating the RHP zero

Lec 19(1): Miller compensation: Eliminating the RHP zero

Thumbnail for Lec 18: Miller compensation; Two-stage Miller compensated OTA; Rough design example

Lec 18: Miller compensation; Two-stage Miller compensated OTA; Rough design example

Thumbnail for Lec 17: Understanding frequency compensation via Root Locus; Phase margin; LHP zero vs. RHP zero

Lec 17: Understanding frequency compensation via Root Locus; Phase margin; LHP zero vs. RHP zero

Thumbnail for EE370 lec25: Delays in a CMOS inverter (II)

EE370 lec25: Delays in a CMOS inverter (II)

Thumbnail for EE370 lec24: Delays in a CMOS inverter (I)

EE370 lec24: Delays in a CMOS inverter (I)

Thumbnail for EE370 lec23: Mid-point voltage (II), Noise margin from VTC

EE370 lec23: Mid-point voltage (II), Noise margin from VTC

Thumbnail for EE370 lec22: Mid-point voltage in a CMOS inverter

EE370 lec22: Mid-point voltage in a CMOS inverter

Thumbnail for EE370 lec21: Voltage Transfer Characteristics of a CMOS inverter

EE370 lec21: Voltage Transfer Characteristics of a CMOS inverter

Thumbnail for EE370 lec19: Capacitance in a MOSFET

EE370 lec19: Capacitance in a MOSFET

Thumbnail for EE370 lec17: Transistor as a switch

EE370 lec17: Transistor as a switch

Thumbnail for Lecture 12: Distortion in analog circuits

Lecture 12: Distortion in analog circuits

Thumbnail for Lecture 11: Noise in cascaded systems; Integrated noise

Lecture 11: Noise in cascaded systems; Integrated noise

Thumbnail for Lec 16(3): First-order system in negative feedback; Unity loop gain freq. & closed-loop bandwidth

Lec 16(3): First-order system in negative feedback; Unity loop gain freq. & closed-loop bandwidth

Thumbnail for Lec 16(2): Does negative feedback reduce output resistance? Types of negative feedback

Lec 16(2): Does negative feedback reduce output resistance? Types of negative feedback

Thumbnail for Lec 16(1): A 25 min recap of the course...

Lec 16(1): A 25 min recap of the course...

Thumbnail for Lec 15(3): Discussion of few problems

Lec 15(3): Discussion of few problems

Thumbnail for Lec 15(1): Need for DC negative feedback in opamps/OTAs

Lec 15(1): Need for DC negative feedback in opamps/OTAs

Thumbnail for Lec 15(2): Finding the signs of opamp for negative feedback

Lec 15(2): Finding the signs of opamp for negative feedback

Thumbnail for Lec 14(3): Motivation for multi-stage OTAs

Lec 14(3): Motivation for multi-stage OTAs

Thumbnail for Lec 14(2): Poles & zeros in cascode and telescopic cascode

Lec 14(2): Poles & zeros in cascode and telescopic cascode

Thumbnail for Lec 14(1): Poles in 5-T OTA; Zeros in differential-mode transfer function

Lec 14(1): Poles in 5-T OTA; Zeros in differential-mode transfer function

Thumbnail for Lecture 10: Nyquist noise theorem, input referred noise

Lecture 10: Nyquist noise theorem, input referred noise

Thumbnail for Lecture 9: Noisy network analysis

Lecture 9: Noisy network analysis

Thumbnail for Lecture 8: Inter-reciprocity contd.. Introduction to thermal noise.

Lecture 8: Inter-reciprocity contd.. Introduction to thermal noise.

Thumbnail for EE370 lec15: ROM, PAL, PLA

EE370 lec15: ROM, PAL, PLA

Thumbnail for EE370 lec16( 2): Wired OR in ROM (one implementation), SPLD, CPLD, FPGA

EE370 lec16( 2): Wired OR in ROM (one implementation), SPLD, CPLD, FPGA

Thumbnail for EE370 lec16( 1): Tutorial problem of setup, hold and clk-to-q delays of a D-flipflop

EE370 lec16( 1): Tutorial problem of setup, hold and clk-to-q delays of a D-flipflop

Thumbnail for Lec 13(2): Poles & zeros due to the ac coupling capacitors used for biasing

Lec 13(2): Poles & zeros due to the ac coupling capacitors used for biasing

Thumbnail for Lec 13(1): Can Miller effect be used to find high-freq pole? intuition for pole locations

Lec 13(1): Can Miller effect be used to find high-freq pole? intuition for pole locations

Thumbnail for Lec 12(5): Poles & zeros in common-source structure; Intro to Miller effect

Lec 12(5): Poles & zeros in common-source structure; Intro to Miller effect

Thumbnail for Lec 12(4): Finding poles & zeros in a common-drain structure by inspection

Lec 12(4): Finding poles & zeros in a common-drain structure by inspection

Thumbnail for Lec 12(3): Example of an uncontrollable/unobservable state

Lec 12(3): Example of an uncontrollable/unobservable state

Thumbnail for Lec 12(2): Zeros in a circuit

Lec 12(2): Zeros in a circuit

Thumbnail for Lec 12(1): Poles in a circuit: When can poles be guessed by inspection?

Lec 12(1): Poles in a circuit: When can poles be guessed by inspection?

Thumbnail for Lec 11(2): Poles in circuit: When can pole locations be guessed by inspection?

Lec 11(2): Poles in circuit: When can pole locations be guessed by inspection?

Thumbnail for Led 11(1): Gain-boosted cascode

Led 11(1): Gain-boosted cascode

Thumbnail for Lecture 7: Inter-reciprocity

Lecture 7: Inter-reciprocity

Thumbnail for EE370 lec13: Static timing analysis (II)

EE370 lec13: Static timing analysis (II)

Thumbnail for EE370 lec14 (1): Review of an FSMD for modulo operation

EE370 lec14 (1): Review of an FSMD for modulo operation

Thumbnail for EE370 lec14( 2): STA with contamination and propagation delays

EE370 lec14( 2): STA with contamination and propagation delays

Thumbnail for Lec 10(3): Folded cascode: swings in unity feedback & advantages over telescopic cascode

Lec 10(3): Folded cascode: swings in unity feedback & advantages over telescopic cascode

Thumbnail for Lec 10(2): Deriving the telescopic cascode

Lec 10(2): Deriving the telescopic cascode

Thumbnail for Lec 10(1): Telescopic cascode, high-swing cascode: Input common-mode range & output swing limits

Lec 10(1): Telescopic cascode, high-swing cascode: Input common-mode range & output swing limits

Thumbnail for Lecture 6: Introduction to Tellegen's theorem, and proof of reciprocity

Lecture 6: Introduction to Tellegen's theorem, and proof of reciprocity

Thumbnail for Lecture 5: ZVT method with inductors; Estimation of number of poles and zeros

Lecture 5: ZVT method with inductors; Estimation of number of poles and zeros

Thumbnail for EE370 lec12: Timing analysis in a digital design

EE370 lec12: Timing analysis in a digital design

Thumbnail for EE370 lec11(1) : Design of controller for a faster algorithm for GCD computation

EE370 lec11(1) : Design of controller for a faster algorithm for GCD computation

Thumbnail for EE370 lec11(2) : Verilog implementation of GCD algorithm

EE370 lec11(2) : Verilog implementation of GCD algorithm

Thumbnail for Lec 9(4): Discussion of a couple of example problems

Lec 9(4): Discussion of a couple of example problems

Thumbnail for Lec 9(3): Introduction to telescopic cascode

Lec 9(3): Introduction to telescopic cascode

Thumbnail for Lec 9(2): Understanding slewing & slew rate in the 5-T OTA

Lec 9(2): Understanding slewing & slew rate in the 5-T OTA

Thumbnail for Lec 9(1): Difference between a VCVS and VCCS in negative feedback

Lec 9(1): Difference between a VCVS and VCCS in negative feedback

Thumbnail for Lec 8(2): How to learn & analyze analog circuits? eg of flipped & super source follower

Lec 8(2): How to learn & analyze analog circuits? eg of flipped & super source follower

Thumbnail for Lec 8(1): Input common-mode range & output swing limits in the 5-T OTA

Lec 8(1): Input common-mode range & output swing limits in the 5-T OTA

Thumbnail for Lec 7(4): Relevance on the range for input common-mode and output

Lec 7(4): Relevance on the range for input common-mode and output

Thumbnail for Lec 7(3): The 5-T OTA: Resistance looking into different nodes

Lec 7(3): The 5-T OTA: Resistance looking into different nodes

Thumbnail for Lec 7(2): The 5-T OTA: Common-mode gain & differential mode gain

Lec 7(2): The 5-T OTA: Common-mode gain & differential mode gain

Thumbnail for Lec 7(1): 5-transistor differential amplifier: Is it really an opamp?

Lec 7(1): 5-transistor differential amplifier: Is it really an opamp?

Thumbnail for EE370 lec 8 (2): FSMD for greatest common divisor computation

EE370 lec 8 (2): FSMD for greatest common divisor computation

Thumbnail for EE370 lec 8 (1) : Introduction to FSM and datapath

EE370 lec 8 (1) : Introduction to FSM and datapath

Thumbnail for Lec 6(3): The 5-transitor amplifier: Output resistance & Short-circuit transconductance

Lec 6(3): The 5-transitor amplifier: Output resistance & Short-circuit transconductance

Thumbnail for Lec 6(2): The 5-transistor amplifier: DC operating point

Lec 6(2): The 5-transistor amplifier: DC operating point

Thumbnail for Lec 6(1): Cascode current source; Recap of some common impedances

Lec 6(1): Cascode current source; Recap of some common impedances

Thumbnail for EE370 lec7: State minimization in FSM, FSMD

EE370 lec7: State minimization in FSM, FSMD

Thumbnail for EE370 lec6: Mealy vs Moore state machines

EE370 lec6: Mealy vs Moore state machines

Thumbnail for EE370 lec5: Verilog (IV)

EE370 lec5: Verilog (IV)

Thumbnail for EE801 (PG seminar course): Do's & Don'ts in a good presentation

EE801 (PG seminar course): Do's & Don'ts in a good presentation

Thumbnail for Lec 5: Evolution of differential amplifier (from common-source to 5-transistor amplifier)

Lec 5: Evolution of differential amplifier (from common-source to 5-transistor amplifier)

Thumbnail for Lec 4(2): Common-drain and common-gate; Resistance looking into the source of a transistor

Lec 4(2): Common-drain and common-gate; Resistance looking into the source of a transistor

Thumbnail for Expansion and compression of analog pulses

Expansion and compression of analog pulses

Thumbnail for Lec 4(1): Biasing common-source amplifier with source feedback; pMOS common-source amplifier example

Lec 4(1): Biasing common-source amplifier with source feedback; pMOS common-source amplifier example

Thumbnail for Lecture 4: Evaluating polynomial coefficients contd..

Lecture 4: Evaluating polynomial coefficients contd..

Thumbnail for Lecture 3: Evaluating polynomial coefficients in a transfer function

Lecture 3: Evaluating polynomial coefficients in a transfer function

Thumbnail for Lec 3(2): Motivation for constant-current biasing; Drain and source feedback

Lec 3(2): Motivation for constant-current biasing; Drain and source feedback

Thumbnail for Lec 3(1): Constant-voltage biasing for a common-source amplifier

Lec 3(1): Constant-voltage biasing for a common-source amplifier

Thumbnail for Lec 2(2): Common-source amplifier: Biasing the transistor

Lec 2(2): Common-source amplifier: Biasing the transistor

Thumbnail for Lec 2(1): A 45 minute recap/intro to MOSFET: from the point of view of building analog circuits

Lec 2(1): A 45 minute recap/intro to MOSFET: from the point of view of building analog circuits

Thumbnail for EE370 lec4: Verilog - (III)

EE370 lec4: Verilog - (III)

Thumbnail for EE370 lec3: Verilog - (II)

EE370 lec3: Verilog - (II)

Thumbnail for Lecture 2: Transfer function and its relation to time-domain signal processing

Lecture 2: Transfer function and its relation to time-domain signal processing

Thumbnail for EE370 lec2: Verilog (I)

EE370 lec2: Verilog (I)

Thumbnail for EE370 Lec1: Overview of digital design implementation (Introductory lecture)

EE370 Lec1: Overview of digital design implementation (Introductory lecture)

Thumbnail for Lecture 1: Introduction: LTI systems

Lecture 1: Introduction: LTI systems

Thumbnail for Lec 1(2): I-V char. of 2-port non-linear network to work as an amp.; Small-signal linear circuit

Lec 1(2): I-V char. of 2-port non-linear network to work as an amp.; Small-signal linear circuit

Thumbnail for Lec 1(1): Why non-linear ckts? 1-port amp. I-V char; operating point & small-signal linear eq. ckt

Lec 1(1): Why non-linear ckts? 1-port amp. I-V char; operating point & small-signal linear eq. ckt

Thumbnail for Lecture 37: To do post schematic: Good layout practices & handling package parasitics

Lecture 37: To do post schematic: Good layout practices & handling package parasitics

Thumbnail for Lecture 25: PA linearization techniques; Switching PA

Lecture 25: PA linearization techniques; Switching PA

Thumbnail for Lecture 24: Class B and AB power amplifier; Power mixer

Lecture 24: Class B and AB power amplifier; Power mixer

Thumbnail for Lecture 23: Introduction to power amplifiers

Lecture 23: Introduction to power amplifiers

Thumbnail for Lecture 36: Intro to Low drop-out regulators (LDO); Understanding LDO as a 2-stage OTA in feedback

Lecture 36: Intro to Low drop-out regulators (LDO); Understanding LDO as a 2-stage OTA in feedback

Thumbnail for Lecture 35(2): Self-biased bandgap reference

Lecture 35(2): Self-biased bandgap reference

Thumbnail for Lecture 35(1): Fractional band-gap reference

Lecture 35(1): Fractional band-gap reference

Thumbnail for Lecture 34: Bandgap reference

Lecture 34: Bandgap reference

Thumbnail for Lecture 33(2): Method of non-linear currents for estimating weak non-linearities

Lecture 33(2): Method of non-linear currents for estimating weak non-linearities

Thumbnail for Lecture 33(1): Using negative feedback to combat non-linearity

Lecture 33(1): Using negative feedback to combat non-linearity

Thumbnail for Lecture 21: Image rejection in super-heterodyne Rx

Lecture 21: Image rejection in super-heterodyne Rx

Thumbnail for Lecture 32: Non-linearity in fully-differential ckts; Techniques to realize a linear transconductor

Lecture 32: Non-linearity in fully-differential ckts; Techniques to realize a linear transconductor

Thumbnail for Lecture 31: Noise in fully differential circuits; Scaling analog circuits for noise and bandwidth

Lecture 31: Noise in fully differential circuits; Scaling analog circuits for noise and bandwidth

Thumbnail for Lecture 30: Input referred noise & offset in 5-transistor OTA and cascodes

Lecture 30: Input referred noise & offset in 5-transistor OTA and cascodes

Thumbnail for Lecture 20: Mixers- Single balanced and double-balanced

Lecture 20: Mixers- Single balanced and double-balanced

Thumbnail for Lecture 19: LNA with inductive degeneration; design considerations

Lecture 19: LNA with inductive degeneration; design considerations

Thumbnail for Lecture 29: Input referred noise voltage & current: Example calculations

Lecture 29: Input referred noise voltage & current: Example calculations

Thumbnail for Lecture 18a: Techniques to mitigate distortion.

Lecture 18a: Techniques to mitigate distortion.

Thumbnail for Lecture 18b: Narrowband LNA design

Lecture 18b: Narrowband LNA design

Thumbnail for Lecture 17: Measures of distortion in RF systems.

Lecture 17: Measures of distortion in RF systems.

Thumbnail for Lecture 28: Intro to noise; Input referred noise voltage and current

Lecture 28: Intro to noise; Input referred noise voltage and current

Thumbnail for Lecture 27(2): Common-mode to differential-mode conversion in diff amp & offset due to mismatch

Lecture 27(2): Common-mode to differential-mode conversion in diff amp & offset due to mismatch

Thumbnail for Lecture 27(1): Mismatch in current mirror

Lecture 27(1): Mismatch in current mirror

Thumbnail for Lecture 16: Need for scattering parameters

Lecture 16: Need for scattering parameters

Thumbnail for Lecture 26(2): Random mismatch & process variations; Relative mismatch; Pelgrom's model

Lecture 26(2): Random mismatch & process variations; Relative mismatch; Pelgrom's model

Thumbnail for Lecture 26(1): Fully differential two stage feedforward compensated OTA with current reuse

Lecture 26(1): Fully differential two stage feedforward compensated OTA with current reuse

Thumbnail for Lecture 25: Common-mode rejection by CMFB & output impedance due to CMFB

Lecture 25: Common-mode rejection by CMFB & output impedance due to CMFB

Thumbnail for Lecture 15: Losses in matching network- Multi-stage matching

Lecture 15: Losses in matching network- Multi-stage matching

Thumbnail for Lecture 24(2): Fully differential two-stage Miller compensated OTA with CMFB design considerations

Lecture 24(2): Fully differential two-stage Miller compensated OTA with CMFB design considerations

Thumbnail for Lecture 24(1): CMFB variants (contd.)

Lecture 24(1): CMFB variants (contd.)

Thumbnail for Lecture 23: Common-mode feedback variants

Lecture 23: Common-mode feedback variants

Thumbnail for Lecture 14: Matching network contd..

Lecture 14: Matching network contd..

Thumbnail for Lecture 22(2): Need for common-mode feedback in fully differential opamps

Lecture 22(2): Need for common-mode feedback in fully differential opamps

Thumbnail for Lecture 22(1): Power supply rejection ratio of 5-transistor OTA; Need for differential signaling

Lecture 22(1): Power supply rejection ratio of 5-transistor OTA; Need for differential signaling

Thumbnail for Lecture 21(2): Nested Miller & Feedforward compensation

Lecture 21(2): Nested Miller & Feedforward compensation

Thumbnail for Lecture 21(1): So far in this course... A 26 minute recap

Lecture 21(1): So far in this course... A 26 minute recap

Thumbnail for Lecture 20(2): Feedforward compensation; comparison with Miller compensation

Lecture 20(2): Feedforward compensation; comparison with Miller compensation

Thumbnail for Lecture 20(1): Ahuja compensation (contd.): Circuit implementation

Lecture 20(1): Ahuja compensation (contd.): Circuit implementation

Thumbnail for Lecture 13: NF optimization for generic two-port network; Introduction to matching networks

Lecture 13: NF optimization for generic two-port network; Introduction to matching networks

Thumbnail for Lecture 19(2): Ahuja compensation: Pole locations; Intuition for complex poles in Ahuja compensation

Lecture 19(2): Ahuja compensation: Pole locations; Intuition for complex poles in Ahuja compensation

Thumbnail for Lecture 19(1): Miller compensation: Adding a series resistor to eliminate RHP zero

Lecture 19(1): Miller compensation: Adding a series resistor to eliminate RHP zero

Thumbnail for Lecture 12: Sensitivity of an Rx; Optimizing source resistance to minimize NF

Lecture 12: Sensitivity of an Rx; Optimizing source resistance to minimize NF

Thumbnail for Lecture 18: Miller OTA: Circuit implementation; Need for DC negative feedback; Systematic offset

Lecture 18: Miller OTA: Circuit implementation; Need for DC negative feedback; Systematic offset

Thumbnail for Lecture 11: Input referred noise: Noise Figure

Lecture 11: Input referred noise: Noise Figure

Thumbnail for Lecture 10: Noise in cascaded systems; Input referred noise

Lecture 10: Noise in cascaded systems; Input referred noise

Thumbnail for Lecture 9: Introduction to thermal noise

Lecture 9: Introduction to thermal noise

Thumbnail for Lecture 17(2): Rough design example of the two-stage Miller compensated OTA

Lecture 17(2): Rough design example of the two-stage Miller compensated OTA

Thumbnail for Lecture 17(1): Introducing the two-stage Miller compensated OTA

Lecture 17(1): Introducing the two-stage Miller compensated OTA

Thumbnail for Lecture 16(3): Understanding Miller & feed-forward compensation from root-locus

Lecture 16(3): Understanding Miller & feed-forward compensation from root-locus

Thumbnail for Lecture 16(2): Time-domain perspective on why LHP zeros are good & RHP zeros are bad for stability

Lecture 16(2): Time-domain perspective on why LHP zeros are good & RHP zeros are bad for stability

Thumbnail for Lecture 16(1): Time-domain understanding on why more poles makes the closed-loop system unstable?

Lecture 16(1): Time-domain understanding on why more poles makes the closed-loop system unstable?

Thumbnail for Lecture 15: Deriving phase margin from root locus; Loop gain more than one & 180deg phase: stable?

Lecture 15: Deriving phase margin from root locus; Loop gain more than one & 180deg phase: stable?

Thumbnail for Lecture 8: Issues with direct-downconversion Rx and evolution of super-heterodyne Rx

Lecture 8: Issues with direct-downconversion Rx and evolution of super-heterodyne Rx

Thumbnail for Lecture 7: LO leakage in mixers and its impact on the overall Rx

Lecture 7: LO leakage in mixers and its impact on the overall Rx

Thumbnail for Lecture 14(3): Need for multi-stage OTAs; 1st order systems in negative feedback

Lecture 14(3): Need for multi-stage OTAs; 1st order systems in negative feedback

Thumbnail for Lecture 14(2): Poles & zeros in telescopic cascode

Lecture 14(2): Poles & zeros in telescopic cascode

Thumbnail for Lecture 14(1): Detecting uncoupled poles; Summary on when to write pole as conductance by cap.

Lecture 14(1): Detecting uncoupled poles; Summary on when to write pole as conductance by cap.

Thumbnail for Lecture 13(4): Poles and zeros in cascode

Lecture 13(4): Poles and zeros in cascode

Thumbnail for Lecture 13(3): 5-transistor OTA: Summary of poles & zeros in differential mode

Lecture 13(3): 5-transistor OTA: Summary of poles & zeros in differential mode

Thumbnail for Lecture 13(2): Zeros in differential mode in the five-transistor OTA (pole-zero cancellation)

Lecture 13(2): Zeros in differential mode in the five-transistor OTA (pole-zero cancellation)

Thumbnail for Lecture 13(1): Pole locations in the five-transistor OTA

Lecture 13(1): Pole locations in the five-transistor OTA

Thumbnail for Lecture 12(5): Intuition for high-freq. pole. Why can't Miller effect be used for high-freq. pole?

Lecture 12(5): Intuition for high-freq. pole. Why can't Miller effect be used for high-freq. pole?

Thumbnail for Lecture 12(4): Miller effect: Intuition behind low-frequency pole location in common-source config.

Lecture 12(4): Miller effect: Intuition behind low-frequency pole location in common-source config.

Thumbnail for Lecture 12(3): Poles & zeros in common-source configuration

Lecture 12(3): Poles & zeros in common-source configuration

Thumbnail for Lecture 12(2): Poles & zeros by inspection in common-drain configuration

Lecture 12(2): Poles & zeros by inspection in common-drain configuration

Thumbnail for Lecture 12(1): Poles & zeros (recap); example of an uncontrollable and unobservable state

Lecture 12(1): Poles & zeros (recap); example of an uncontrollable and unobservable state

Thumbnail for Lecture 11(2): Test to find presence of zeros; Origin of zeros; Calculating zero location

Lecture 11(2): Test to find presence of zeros; Origin of zeros; Calculating zero location

Thumbnail for Lecture 11(1): Pole location; When can poles be approx as ratio of conductance & cap.?

Lecture 11(1): Pole location; When can poles be approx as ratio of conductance & cap.?

Thumbnail for Lecture 5: Introduction to RF chain contd.. (Effect of transmission lines; need for matching)

Lecture 5: Introduction to RF chain contd.. (Effect of transmission lines; need for matching)

Thumbnail for Lecture 6: Intro to RF chain contd... A ten-thousand feet overview on clocking, VCO and PLL.

Lecture 6: Intro to RF chain contd... A ten-thousand feet overview on clocking, VCO and PLL.

Thumbnail for Lecture 10(2): Gain-boosted cascode; Gm boosting

Lecture 10(2): Gain-boosted cascode; Gm boosting

Thumbnail for Lecture 10(1): Slew rate of a folded cascode OTA

Lecture 10(1): Slew rate of a folded cascode OTA

Thumbnail for Lecture 9(1): Motivation for folded cascode opamp; Telescopic cascode opamp in unity feedback

Lecture 9(1): Motivation for folded cascode opamp; Telescopic cascode opamp in unity feedback

Thumbnail for Lecture 9(2): Merits of folded-cascode: Input common-mode range, output range, unity feedback swings

Lecture 9(2): Merits of folded-cascode: Input common-mode range, output range, unity feedback swings

Thumbnail for Lecture 8: Telescopic cascode: DC op. point, dc gain, input common-mode range & output swing limits

Lecture 8: Telescopic cascode: DC op. point, dc gain, input common-mode range & output swing limits

Thumbnail for Lecture 7: Systematic design of analog circuits using look-up tables (gm/Id based) & design example

Lecture 7: Systematic design of analog circuits using look-up tables (gm/Id based) & design example

Thumbnail for Lecture 4: Intro to RF chain contd.. (Requirement of filtering in Receiver) need for matching.

Lecture 4: Intro to RF chain contd.. (Requirement of filtering in Receiver) need for matching.

Thumbnail for Lecture 6(3): Common mode & differential mode response of the 5-transistor OTA

Lecture 6(3): Common mode & differential mode response of the 5-transistor OTA

Thumbnail for Lecture 6(2): Impedances at each node in the 5-transistor OTA

Lecture 6(2): Impedances at each node in the 5-transistor OTA

Thumbnail for Lecture 6(1): Example problems; Defining the impedance looking up and down into a node

Lecture 6(1): Example problems; Defining the impedance looking up and down into a node

Thumbnail for Lecture 5(2): Slew rate of the five-transistor OTA

Lecture 5(2): Slew rate of the five-transistor OTA

Thumbnail for Lecture 5(1): Step response of a VCCS vs. VCVS in negative feedback with a capacitive load

Lecture 5(1): Step response of a VCCS vs. VCVS in negative feedback with a capacitive load

Thumbnail for Lecture 4(3): Input common-mode range and output range calculations in the five-transistor OTA

Lecture 4(3): Input common-mode range and output range calculations in the five-transistor OTA

Thumbnail for Lecture 4(2): Why input common-mode & output range are relevant in opamps?

Lecture 4(2): Why input common-mode & output range are relevant in opamps?

Thumbnail for Lecture 4(1): Summary of differential amplifier; OTA vs opamp

Lecture 4(1): Summary of differential amplifier; OTA vs opamp

Thumbnail for Lecture 3c: Intro to RF chain contd.. (Switching PA)

Lecture 3c: Intro to RF chain contd.. (Switching PA)

Thumbnail for Lecture 3b: Intro to RF chain contd.. (Linear PA)

Lecture 3b: Intro to RF chain contd.. (Linear PA)

Thumbnail for Lecture 3a: Why is 50ohm the impedance of choice?

Lecture 3a: Why is 50ohm the impedance of choice?

Thumbnail for Lecture 3(3): The 5-transistor amplifier: Short-circuit transconductance & output resistance

Lecture 3(3): The 5-transistor amplifier: Short-circuit transconductance & output resistance

Thumbnail for Lecture 3(2): The five-transistor amplifier: DC operating point

Lecture 3(2): The five-transistor amplifier: DC operating point

Thumbnail for Lecture 3(1): Differential amplifier: Differential mode & common-mode half circuits

Lecture 3(1): Differential amplifier: Differential mode & common-mode half circuits

Thumbnail for Lecture 2: Introduction to basic Transceiver architecture (contd..)

Lecture 2: Introduction to basic Transceiver architecture (contd..)

Thumbnail for Lecture 2: Recap of Common source, drain & gate configurations; Re-intro to differential amplifier

Lecture 2: Recap of Common source, drain & gate configurations; Re-intro to differential amplifier

Thumbnail for Lecture 1: MOSFET recap: Strong inversion vs. weak inversion vs. linear region; Universality of VCCS

Lecture 1: MOSFET recap: Strong inversion vs. weak inversion vs. linear region; Universality of VCCS

Thumbnail for Lecture 23: 2nd-order system in negative feedback; Types of damping; Deriving phase margin

Lecture 23: 2nd-order system in negative feedback; Types of damping; Deriving phase margin

Thumbnail for Lecture 22: Differences between voltage & current feedback; 1st order system in negative feedback

Lecture 22: Differences between voltage & current feedback; 1st order system in negative feedback

Thumbnail for Lecture 21: Negative feedback and loop gain

Lecture 21: Negative feedback and loop gain

Thumbnail for Lecture 20: Relevance of input common-mode range & output limits; Two-stage OTA & biasing

Lecture 20: Relevance of input common-mode range & output limits; Two-stage OTA & biasing

Thumbnail for Lecture 19: DC operating point and input common-mode range in a five-transistor OTA

Lecture 19: DC operating point and input common-mode range in a five-transistor OTA

Thumbnail for Lecture 18: The 5-transistor differential amplifier: Differential & common-mode gain

Lecture 18: The 5-transistor differential amplifier: Differential & common-mode gain

Thumbnail for Lecture 1: Introduction to the course

Lecture 1: Introduction to the course

Thumbnail for Lecture 17: Differential amplifier - II

Lecture 17: Differential amplifier - II

Thumbnail for Lecture 16: CMOS inverter, differential amplifier-I

Lecture 16: CMOS inverter, differential amplifier-I

Thumbnail for Lecture 15: Common source amplifier with an active load

Lecture 15: Common source amplifier with an active load

Thumbnail for Lecture 19(2): Digital calibration with PN dither based correlation: Gradient descent & LMS

Lecture 19(2): Digital calibration with PN dither based correlation: Gradient descent & LMS

Thumbnail for Lecture 19(1): Pipelined ADC: Thermal noise

Lecture 19(1): Pipelined ADC: Thermal noise

Thumbnail for Lecture 18(3): Pipelined ADC: M-DAC gain error & DAC mismatch: Digital calibration to tackle them

Lecture 18(3): Pipelined ADC: M-DAC gain error & DAC mismatch: Digital calibration to tackle them

Thumbnail for Lecture 18(2): Pipelined Flash ADC: Circuit implementation of the multiplying-DAC (M-DAC)

Lecture 18(2): Pipelined Flash ADC: Circuit implementation of the multiplying-DAC (M-DAC)

Thumbnail for Lecture 18(1): Pipelined ADC: Redundancy to tackle sub-ADC error; Deriving 1.5 bit & M+0.5 bit stage

Lecture 18(1): Pipelined ADC: Redundancy to tackle sub-ADC error; Deriving 1.5 bit & M+0.5 bit stage

Thumbnail for Lecture 17(3): Introduction to multi-step & Pipelined ADCs

Lecture 17(3): Introduction to multi-step & Pipelined ADCs

Thumbnail for Lecture 17(2): SAR ADC: Effect of capacitor mismatch: Understanding why digital calibration works

Lecture 17(2): SAR ADC: Effect of capacitor mismatch: Understanding why digital calibration works

Thumbnail for Lecture 17(1): SAR ADC: Split C-DAC technique for reducing the total capacitance

Lecture 17(1): SAR ADC: Split C-DAC technique for reducing the total capacitance

Thumbnail for Lecture 16(2): Redundancy to solve incomplete DAC settling; Deriving condition for redundancy & eg.,

Lecture 16(2): Redundancy to solve incomplete DAC settling; Deriving condition for redundancy & eg.,

Thumbnail for Lecture 16(1): Asynchronous SAR ADC: Understanding how to implement a self-timed asynchronous SAR

Lecture 16(1): Asynchronous SAR ADC: Understanding how to implement a self-timed asynchronous SAR

Thumbnail for Lecture 15: SAR ADC; Deriving the capacitive DAC switching schemes & the monotonic switching scheme

Lecture 15: SAR ADC; Deriving the capacitive DAC switching schemes & the monotonic switching scheme

Thumbnail for Lecture 14 (2): Condition for saturation region in an NMOS transistor vs PMOS transistor

Lecture 14 (2): Condition for saturation region in an NMOS transistor vs PMOS transistor

Thumbnail for Lecture 14: Building circuits with PMOS transistor

Lecture 14: Building circuits with PMOS transistor

Thumbnail for Lecture 13 (3): Quick and approximate analysis of a circuit with multiple controlled sources.

Lecture 13 (3): Quick and approximate analysis of a circuit with multiple controlled sources.

Thumbnail for Lecture 13 (2): Impedance looking at the source of the transistor

Lecture 13 (2): Impedance looking at the source of the transistor

Thumbnail for Lecture 13 (1): Impedance looking into the drain of a transistor

Lecture 13 (1): Impedance looking into the drain of a transistor

Thumbnail for Lecture 14: Time-interleaved ADCs; Gain, timing & offset mismatch; Calibration to correct mismatches

Lecture 14: Time-interleaved ADCs; Gain, timing & offset mismatch; Calibration to correct mismatches

Thumbnail for Lecture 12 (3): Summary: VCVS, VCCS, CCCS and CCVS using an NMOS transistor

Lecture 12 (3): Summary: VCVS, VCCS, CCCS and CCVS using an NMOS transistor

Thumbnail for Lecture 12 (2): Implementing a CCVS using a transistor

Lecture 12 (2): Implementing a CCVS using a transistor

Thumbnail for Lecture 12(1): Implementing a CCCS using a transistor

Lecture 12(1): Implementing a CCCS using a transistor

Thumbnail for Lecture 11: Implementing a VCCS using a transistor

Lecture 11: Implementing a VCCS using a transistor

Thumbnail for Lecture 13: Interpolation in Flash ADC: Voltage & Time based interpolation

Lecture 13: Interpolation in Flash ADC: Voltage & Time based interpolation

Thumbnail for Lecture 12(2): Latch offset: Using dynamic pre-amplifier & Calibration to reduce offset

Lecture 12(2): Latch offset: Using dynamic pre-amplifier & Calibration to reduce offset

Thumbnail for Lecture 12(1): Flash ADC: single-ended & differential; Reference subtraction in voltage & current

Lecture 12(1): Flash ADC: single-ended & differential; Reference subtraction in voltage & current

Thumbnail for Lecture 10(2): Implementing a VCVS using a transistor

Lecture 10(2): Implementing a VCVS using a transistor

Thumbnail for Lecture 10(1): Common source amplifier with constant current bias - IV

Lecture 10(1): Common source amplifier with constant current bias - IV

Thumbnail for Lecture 11: Deriving the StrongARM latch

Lecture 11: Deriving the StrongARM latch

Thumbnail for Lecture 9(2): Miscellanea on switched-capacitors

Lecture 9(2): Miscellanea on switched-capacitors

Thumbnail for Lecture 9(1): Correlated double-sampling (CDS) & correlated level-shifting (CLS)

Lecture 9(1): Correlated double-sampling (CDS) & correlated level-shifting (CLS)

Thumbnail for Lecture 9: Negative feedback loops

Lecture 9: Negative feedback loops

Thumbnail for Lecture 8(2): N-path filters & passive mixers (brief introduction)

Lecture 8(2): N-path filters & passive mixers (brief introduction)

Thumbnail for Lecture 8(1): Switched-capacitor integrator (delayed & delay-free)

Lecture 8(1): Switched-capacitor integrator (delayed & delay-free)

Thumbnail for Lecture 8: Common source amplifier with constant current bias-III

Lecture 8: Common source amplifier with constant current bias-III

Thumbnail for Lecture 7: Common source amplifier with constant current bias - II

Lecture 7: Common source amplifier with constant current bias - II

Thumbnail for Lecture 7: Recap; Example problems on solving switched-capacitor circuits using charge conservation

Lecture 7: Recap; Example problems on solving switched-capacitor circuits using charge conservation

Thumbnail for Lecture 6(3): Understanding charge-conservation in switched-capacitor circuits from KCL

Lecture 6(3): Understanding charge-conservation in switched-capacitor circuits from KCL

Thumbnail for Lecture 6(2): Deriving the switched-capacitor amplifier

Lecture 6(2): Deriving the switched-capacitor amplifier

Thumbnail for Lecture 6(1): Non-linearity from signal-dependent charge injection; Bottom-plate sampling to rescue

Lecture 6(1): Non-linearity from signal-dependent charge injection; Bottom-plate sampling to rescue

Thumbnail for Lecture 5(3): Thermal noise of switch; Variance & PSD of sampled noise in a track & hold

Lecture 5(3): Thermal noise of switch; Variance & PSD of sampled noise in a track & hold

Thumbnail for Lecture 5(2): Deriving the gate boostrapped switch

Lecture 5(2): Deriving the gate boostrapped switch

Thumbnail for Lecture 5(1): ON resistance of a MOS switch & non-linearity; CMOS/transmission gate switch

Lecture 5(1): ON resistance of a MOS switch & non-linearity; CMOS/transmission gate switch

Thumbnail for Lecture 6: Constant current bias in common source amplifier

Lecture 6: Constant current bias in common source amplifier

Thumbnail for Lecture 5: Input signal swing limits in a common source amplifier

Lecture 5: Input signal swing limits in a common source amplifier

Thumbnail for Lecture 4(3): Sampling switch; Effect of finite ON resistance for dc & varying signals; nMOS switch

Lecture 4(3): Sampling switch; Effect of finite ON resistance for dc & varying signals; nMOS switch

Thumbnail for Lecture 4(2): Static non-linearity of an ADC: Differential & Integral non-linearity (DNL & INL)

Lecture 4(2): Static non-linearity of an ADC: Differential & Integral non-linearity (DNL & INL)

Thumbnail for Lecture 4(1): Example calculations from ADC spectrum; Aliasing of harmonics

Lecture 4(1): Example calculations from ADC spectrum; Aliasing of harmonics

Thumbnail for Lecture 4: Building an amplifier using a MOSFET

Lecture 4: Building an amplifier using a MOSFET

Thumbnail for Lecture 3: MOSFET I-V characteristics; Identifying region of operation for amplification

Lecture 3: MOSFET I-V characteristics; Identifying region of operation for amplification

Thumbnail for Lecture 3(2): Windowing to reduce spectral leakage; Choosing the right input frequency to test ADC

Lecture 3(2): Windowing to reduce spectral leakage; Choosing the right input frequency to test ADC

Thumbnail for Lecture 3(1): Recap; DFT of a sinusoid; Signal on a bin; Signal not on a bin: Spectral leakage

Lecture 3(1): Recap; DFT of a sinusoid; Signal on a bin; Signal not on a bin: Spectral leakage

Thumbnail for Lecture 2(3): Deriving the discrete Fourier transform (DFT); Measuring SQNR

Lecture 2(3): Deriving the discrete Fourier transform (DFT); Measuring SQNR

Thumbnail for Lecture 2(2): Measuring SQNR: Recap of spectral analysis; Voltage & power spectral density (PSD)

Lecture 2(2): Measuring SQNR: Recap of spectral analysis; Voltage & power spectral density (PSD)

Thumbnail for Lecture 2(1): Quantization; Signal-to-quantization noise ratio (SQNR); Effective no. bits (ENOB)

Lecture 2(1): Quantization; Signal-to-quantization noise ratio (SQNR); Effective no. bits (ENOB)

Thumbnail for Lecture 2: Small-signal linear analysis for a one-port network, Analysis of a 2-port network

Lecture 2: Small-signal linear analysis for a one-port network, Analysis of a 2-port network

Thumbnail for Lecture 1: Sampling: aliasing, anti-alias filter, oversampling; Signal reconstruction from samples

Lecture 1: Sampling: aliasing, anti-alias filter, oversampling; Signal reconstruction from samples

Thumbnail for Lecture 27: Phase-locked loop - III

Lecture 27: Phase-locked loop - III

Thumbnail for Lecture 1: Need for nonlinearity, Analysis of one-port nonlinear device

Lecture 1: Need for nonlinearity, Analysis of one-port nonlinear device

Thumbnail for Lecture 26: Phase-locked loop - II

Lecture 26: Phase-locked loop - II

Thumbnail for Lecture 25: Design of ring oscillator-II, Introduction to PLL

Lecture 25: Design of ring oscillator-II, Introduction to PLL

Thumbnail for Lecture 24: Design of a ring oscillator

Lecture 24: Design of a ring oscillator

Thumbnail for Lecture 23: Oscillators-V

Lecture 23: Oscillators-V

Thumbnail for Lecture 22: Oscillators-IV

Lecture 22: Oscillators-IV

Thumbnail for Lecture 21: Oscillators--III

Lecture 21: Oscillators--III

Thumbnail for Lecture 20: Oscillators - II

Lecture 20: Oscillators - II

Thumbnail for Lecture 19: Jitter in delay line vs ring oscillator; Oscillators-I

Lecture 19: Jitter in delay line vs ring oscillator; Oscillators-I

Thumbnail for Lecture 18: Phase noise/jitter analysis in VCO, inverter and delay line

Lecture 18: Phase noise/jitter analysis in VCO, inverter and delay line

Thumbnail for Lecture 17: Relationship between phase noise and jitter

Lecture 17: Relationship between phase noise and jitter

Thumbnail for Lecture 16: Jitter definitions, jitter characterizations

Lecture 16: Jitter definitions, jitter characterizations

Thumbnail for Lecture 15: Noise, PSD, thermal and flicker noise

Lecture 15: Noise, PSD, thermal and flicker noise

Thumbnail for Why are Indians so good at circuit design? 🤔😂

Why are Indians so good at circuit design? 🤔😂

Thumbnail for Lecture 40: Loop gain of two stage amplifier and its impact on stability

Lecture 40: Loop gain of two stage amplifier and its impact on stability

Thumbnail for Lecture 41: Stability of two stage opamps and introduction to Miller compensation

Lecture 41: Stability of two stage opamps and introduction to Miller compensation

Thumbnail for Lecture 39: Relating the damping factor of a second order closed loop system to phase margin of L(s)

Lecture 39: Relating the damping factor of a second order closed loop system to phase margin of L(s)

Thumbnail for "Chip" design: then vs. now! 😂

"Chip" design: then vs. now! 😂

Thumbnail for Lecture 38: Introduction to analog layout techniques & conclusion

Lecture 38: Introduction to analog layout techniques & conclusion

Thumbnail for Lecture 37: Capacitances in a MOS transistor and its effects on amplifier

Lecture 37: Capacitances in a MOS transistor and its effects on amplifier

Thumbnail for Lecture 38: Relation between open loop gain and the the closed loop response

Lecture 38: Relation between open loop gain and the the closed loop response

Thumbnail for Lecture 37: Constant-gm biasing: Deriving its multiple variants; Stability of constant-gm bias ckts.

Lecture 37: Constant-gm biasing: Deriving its multiple variants; Stability of constant-gm bias ckts.

Thumbnail for Lecture 36(2): Deriving flipped voltage follower & super source follower: How to study analog ckts?

Lecture 36(2): Deriving flipped voltage follower & super source follower: How to study analog ckts?

Thumbnail for Lecture 36(1): Low drop-out (LDO) regulators: a brief introduction

Lecture 36(1): Low drop-out (LDO) regulators: a brief introduction

Thumbnail for Lecture 36: Differential amplifier with current mirror load

Lecture 36: Differential amplifier with current mirror load

Thumbnail for Lecture 35: Self-biased bandgap reference; positive vs. negative feedback; Fractional bandgap ref.

Lecture 35: Self-biased bandgap reference; positive vs. negative feedback; Fractional bandgap ref.

Thumbnail for Lecture 35: Loop gain of a negative feedback loop using a differential amplifier

Lecture 35: Loop gain of a negative feedback loop using a differential amplifier

Thumbnail for Lecture 34: Introduction to differential amplifier for use in negative feedback loop

Lecture 34: Introduction to differential amplifier for use in negative feedback loop

Thumbnail for Lecture 34: Bandgap reference

Lecture 34: Bandgap reference

Thumbnail for Lecture 33(2): Rail-to-rail input common-mode opamp; Gm equalization

Lecture 33(2): Rail-to-rail input common-mode opamp; Gm equalization

Thumbnail for Lecture 33(1): Class-AB output stage; Class-AB bias using a) Monti-Celli scheme, b) pseudo resistor

Lecture 33(1): Class-AB output stage; Class-AB bias using a) Monti-Celli scheme, b) pseudo resistor

Thumbnail for Lecture 33: Designing an amplifier using negative feedback

Lecture 33: Designing an amplifier using negative feedback

Thumbnail for Lecture 32: Wide-swing current mirror

Lecture 32: Wide-swing current mirror

Thumbnail for Lecture 31: Cascode current mirrors

Lecture 31: Cascode current mirrors

Thumbnail for Lecture 30: Introduction to current mirrors and the effect of channel length modulation

Lecture 30: Introduction to current mirrors and the effect of channel length modulation

Thumbnail for Lecture 32(2): The method of current injection for calculating weak non-linearities

Lecture 32(2): The method of current injection for calculating weak non-linearities

Thumbnail for Lecture 32(1): Improving linearity using negative feedback; pre-distortion in negative feedback

Lecture 32(1): Improving linearity using negative feedback; pre-distortion in negative feedback

Thumbnail for Lecture 31: Non-linearity: distortion in fully-diff. ckts; source degeneration for linearizing gm

Lecture 31: Non-linearity: distortion in fully-diff. ckts; source degeneration for linearizing gm

Thumbnail for Lecture 27: Channel length modulation in MOSFET

Lecture 27: Channel length modulation in MOSFET

Thumbnail for Lecture 28: Use of a current buffer to improve voltage gain; Introduction to body effect

Lecture 28: Use of a current buffer to improve voltage gain; Introduction to body effect

Thumbnail for Lecture 29: Use of a current buffer (Common gate config) contd..

Lecture 29: Use of a current buffer (Common gate config) contd..

Thumbnail for Lecture 30: Noise in multi-stage & fully diff OTA; Impedance scaling for noise; Noise-power tradeoff

Lecture 30: Noise in multi-stage & fully diff OTA; Impedance scaling for noise; Noise-power tradeoff

Thumbnail for Lecture 29: Input referred noise and offset in five-transistor OTA and telescopic cascode

Lecture 29: Input referred noise and offset in five-transistor OTA and telescopic cascode

Thumbnail for Lecture 28: Input referred noise calculation examples

Lecture 28: Input referred noise calculation examples

Thumbnail for Lecture 24: Using a constant current source to bias a transistor

Lecture 24: Using a constant current source to bias a transistor

Thumbnail for Lecture 25: Design of controlled sources using MOSFETs

Lecture 25: Design of controlled sources using MOSFETs

Thumbnail for Lecture 26: Synthesis of a common-drain and a common-gate configuration

Lecture 26: Synthesis of a common-drain and a common-gate configuration

Thumbnail for Lecture 27: Noise resistors & MOSFETs; Input ref. noise voltage & current in a linear 2-port network

Lecture 27: Noise resistors & MOSFETs; Input ref. noise voltage & current in a linear 2-port network

Thumbnail for Lecture 26(2): Mismatch in current mirror

Lecture 26(2): Mismatch in current mirror

Thumbnail for Lecture 26(1): Resistors and capacitors on ICs; Random mismatch; Process variations; Pelgrom's law

Lecture 26(1): Resistors and capacitors on ICs; Random mismatch; Process variations; Pelgrom's law

Thumbnail for Lecture 25: Output impedance due to CMFB; Inductive output impedance due to negative feedback

Lecture 25: Output impedance due to CMFB; Inductive output impedance due to negative feedback

Thumbnail for Lecture 22: Constant current source biasing

Lecture 22: Constant current source biasing

Thumbnail for Lecture 23: Constant current bias, by applying current at the source.

Lecture 23: Constant current bias, by applying current at the source.

Thumbnail for Lecture 24(3): Two-stage fully differential current-reuse feedforward OTA with CMFB

Lecture 24(3): Two-stage fully differential current-reuse feedforward OTA with CMFB

Thumbnail for Lecture 24(2): Common-mode rejection by CMFB; Speed of CMFB; Effect of CMFB on CM output resistance

Lecture 24(2): Common-mode rejection by CMFB; Speed of CMFB; Effect of CMFB on CM output resistance

Thumbnail for Lecture 24(1): Two-stage fully-differential Miller OTA (recap)

Lecture 24(1): Two-stage fully-differential Miller OTA (recap)

Thumbnail for Lecture 23(3): Fully-differential two-stage Miller compensted OTA with CMFB; Choice for CMFBs

Lecture 23(3): Fully-differential two-stage Miller compensted OTA with CMFB; Choice for CMFBs

Thumbnail for Lecture 23(2): CMFB variants(3): Tuning nMOS current: Replica bias & current bleeding

Lecture 23(2): CMFB variants(3): Tuning nMOS current: Replica bias & current bleeding

Thumbnail for Lecture 23(1): CMFB variants(2) Source follower to buffer resistive CMD; Using a MOS-based CMD

Lecture 23(1): CMFB variants(2) Source follower to buffer resistive CMD; Using a MOS-based CMD

Thumbnail for Lecture 21: Introduction to constant current biasing

Lecture 21: Introduction to constant current biasing

Thumbnail for Lecture 19: Finding the values of the capacitances to be used in a common source amplifier

Lecture 19: Finding the values of the capacitances to be used in a common source amplifier

Thumbnail for Lecture 18: Use to a capacitor to replace a floating battery for biasing

Lecture 18: Use to a capacitor to replace a floating battery for biasing

Thumbnail for Lecture 20: Introduction of an NMOS transistor and its similarities with the PMOS device

Lecture 20: Introduction of an NMOS transistor and its similarities with the PMOS device

Thumbnail for Lecture 22: Common-mode feedback (CMFB) variants: Resistive common-mode detector with & without OTA

Lecture 22: Common-mode feedback (CMFB) variants: Resistive common-mode detector with & without OTA

Thumbnail for Lecture 21(2): Need for common-mode feedback in fully-differential OTAs

Lecture 21(2): Need for common-mode feedback in fully-differential OTAs

Thumbnail for Lecture 21(1): Differential signaling; Pow. supply rej. ratio PSRR; Pseudo & fully differential ckts

Lecture 21(1): Differential signaling; Pow. supply rej. ratio PSRR; Pseudo & fully differential ckts

Thumbnail for Lecture 20(3): 2-stage Miller OTA in unity feedback; Positive or negative feedback?

Lecture 20(3): 2-stage Miller OTA in unity feedback; Positive or negative feedback?

Thumbnail for Lecture 20(2): 3-stage OTA; Nested Miller & Feedforward compensation; Effect of gate cap in res. F/B

Lecture 20(2): 3-stage OTA; Nested Miller & Feedforward compensation; Effect of gate cap in res. F/B

Thumbnail for Lecture 20(1): Recap: diff-amp, cascode; finding pole location by inspection; Frequency compensation

Lecture 20(1): Recap: diff-amp, cascode; finding pole location by inspection; Frequency compensation

Thumbnail for Lecture 17: A basic amplifier topology using a PMOS transistor

Lecture 17: A basic amplifier topology using a PMOS transistor

Thumbnail for Lecture 14: Discrete time DLL model, Type-II DLL, DLL applications

Lecture 14: Discrete time DLL model, Type-II DLL, DLL applications

Thumbnail for Lecture 15: Various regions of operation of a P-MOSFET

Lecture 15: Various regions of operation of a P-MOSFET

Thumbnail for Lecture 16b: Biasing a P-MOSFET in saturation contd...

Lecture 16b: Biasing a P-MOSFET in saturation contd...

Thumbnail for Lecture 16a: Biasing a P-MOSFET in saturation region and application of incremental input

Lecture 16a: Biasing a P-MOSFET in saturation region and application of incremental input

Thumbnail for Lecture 19: Look-up table-based design of analog circuits (gm/Id design) Example design in Spectre

Lecture 19: Look-up table-based design of analog circuits (gm/Id design) Example design in Spectre

Thumbnail for Lecture 18: Feedforward compensated two-stage OTA; Feedforward vs. Miller compensation: comparison

Lecture 18: Feedforward compensated two-stage OTA; Feedforward vs. Miller compensation: comparison

Thumbnail for Lecture-13: S-domain model analysis for DLL, Discrete time modeling of DLL

Lecture-13: S-domain model analysis for DLL, Discrete time modeling of DLL

Thumbnail for Lecture 12: Small signal phase domain model of the DLL - I

Lecture 12: Small signal phase domain model of the DLL - I

Thumbnail for Lecture 11: Charge pumps - III, transistor mismatches, modelling a DLL

Lecture 11: Charge pumps - III, transistor mismatches, modelling a DLL

Thumbnail for Lecture 10: Charge pumps - II

Lecture 10: Charge pumps - II

Thumbnail for Lecture 17(1): Eliminating the RHP zero: Using a zero-cancelling series resistor

Lecture 17(1): Eliminating the RHP zero: Using a zero-cancelling series resistor

Thumbnail for Lecture 17(3): Ahuja compensation: Eliminating the RHP zero

Lecture 17(3): Ahuja compensation: Eliminating the RHP zero

Thumbnail for Lecture 17(2): Two-stage Miller OTA: Design example

Lecture 17(2): Two-stage Miller OTA: Design example

Thumbnail for Lecture 16: Two-stage Miller compensated OTA: Transistor-level implementation; Systematic offset

Lecture 16: Two-stage Miller compensated OTA: Transistor-level implementation; Systematic offset

Thumbnail for Lecture 15: Miller compensation; 2-stage Miller compensated OTA; Design choices; Dominant pole comp.

Lecture 15: Miller compensation; 2-stage Miller compensated OTA; Design choices; Dominant pole comp.

Thumbnail for Lecture 13: Introduction to the I-V char of a p-MOSFET

Lecture 13: Introduction to the I-V char of a p-MOSFET

Thumbnail for Lecture 14: Introduction to the small-signal model of a p-MOSFET

Lecture 14: Introduction to the small-signal model of a p-MOSFET

Thumbnail for Lecture 14(2): Using root-locus to understand ways to stabilize; Miller & Feed-forward compensation

Lecture 14(2): Using root-locus to understand ways to stabilize; Miller & Feed-forward compensation

Thumbnail for Lecture 14(1): Understanding the effect of poles & zeros in time domain; LHP zeros vs. RHP zeros

Lecture 14(1): Understanding the effect of poles & zeros in time domain; LHP zeros vs. RHP zeros

Thumbnail for Lecture 12: Evolution of a device needed for amplification

Lecture 12: Evolution of a device needed for amplification

Thumbnail for Lecture 11: Relating a mechanical amplifier to an electronic counterpart

Lecture 11: Relating a mechanical amplifier to an electronic counterpart

Thumbnail for Lecture 13: Using Root Locus to understand stability; Mapping it to Phase margin in the Bode plot

Lecture 13: Using Root Locus to understand stability; Mapping it to Phase margin in the Bode plot

Thumbnail for Lecture 12(2): Need for multi-stage OTAs; Unity-loop gain freq. & closed-loop BW in 1st order system

Lecture 12(2): Need for multi-stage OTAs; Unity-loop gain freq. & closed-loop BW in 1st order system

Thumbnail for Lecture 12(1): Poles & zeros in a cascode and telescopic cascode OTA

Lecture 12(1): Poles & zeros in a cascode and telescopic cascode OTA

Thumbnail for Lecture 11: Poles in the 5-transistor OTA; Zeros in the differential mode transfer function

Lecture 11: Poles in the 5-transistor OTA; Zeros in the differential mode transfer function

Thumbnail for Lecture 10: Desirable I-V characteristics of a non-linear two port for amplification

Lecture 10: Desirable I-V characteristics of a non-linear two port for amplification

Thumbnail for Lecture 9: Desirable characteristics of two-port incremental network for amplification

Lecture 9: Desirable characteristics of two-port incremental network for amplification

Thumbnail for Lecture 8: Locking nonidealities in a DLL

Lecture 8: Locking nonidealities in a DLL

Thumbnail for Lecture 7: Locking in a DLL

Lecture 7: Locking in a DLL

Thumbnail for Lecture 8: Introduction to non-linear two port network

Lecture 8: Introduction to non-linear two port network

Thumbnail for Lecture 6: Developing a generic framework for small signal equivalent

Lecture 6: Developing a generic framework for small signal equivalent

Thumbnail for Lecture 7: Requirement of non-linearity for power amplification

Lecture 7: Requirement of non-linearity for power amplification

Thumbnail for Lecture 10(2): Poles & zeros in common-source amp.; Intuition behind pole locations; Miller approx.

Lecture 10(2): Poles & zeros in common-source amp.; Intuition behind pole locations; Miller approx.

Thumbnail for Lecture 10(1): Source follower: poles & zeros by inspection

Lecture 10(1): Source follower: poles & zeros by inspection

Thumbnail for Lecture 9: Poles and zeros; Finding location of zeros and approx. pole locations by inspection

Lecture 9: Poles and zeros; Finding location of zeros and approx. pole locations by inspection

Thumbnail for Lecture 8(2): Gain boosted cascode

Lecture 8(2): Gain boosted cascode

Thumbnail for Lecture 8(1): Slew rate in a telescopic cascode opamp

Lecture 8(1): Slew rate in a telescopic cascode opamp

Thumbnail for Lecture 6: Phase detectors - III

Lecture 6: Phase detectors - III

Thumbnail for Lecture 4: Linearizing a non-linear element

Lecture 4: Linearizing a non-linear element

Thumbnail for Lecture 5: Incremental analysis with generic non-linearity

Lecture 5: Incremental analysis with generic non-linearity

Thumbnail for Lecture 7(2): Folded cascode opamp: DC operating point, small-signal gain & swing limits

Lecture 7(2): Folded cascode opamp: DC operating point, small-signal gain & swing limits

Thumbnail for Lecture 6: Telescopic cascode opamp: DC operating point, small-signal gain, swing limits

Lecture 6: Telescopic cascode opamp: DC operating point, small-signal gain, swing limits

Thumbnail for Lecture 7(1): Telescopic cascode: output swing limits & biasing; High-swing cascode current mirror

Lecture 7(1): Telescopic cascode: output swing limits & biasing; High-swing cascode current mirror

Thumbnail for Lecture 5: Phase detectors -II

Lecture 5: Phase detectors -II

Thumbnail for Lecture 4: Delay tuning using varactors, phase detector

Lecture 4: Delay tuning using varactors, phase detector

Thumbnail for Lecture 5(d): Common-mode and differential mode gain in a five-transistor OTA

Lecture 5(d): Common-mode and differential mode gain in a five-transistor OTA

Thumbnail for Lecture 5(c): Recap of small-signal impedances at each node in the five-transistor OTA

Lecture 5(c): Recap of small-signal impedances at each node in the five-transistor OTA

Thumbnail for Lecture 5(b): Step response with a capacitive load: VCVS vs. VCCS

Lecture 5(b): Step response with a capacitive load: VCVS vs. VCCS

Thumbnail for Lecture 5(a): Input & Output common-mode ranges in the five-transistor OTA with a pMOS input pair

Lecture 5(a): Input & Output common-mode ranges in the five-transistor OTA with a pMOS input pair

Thumbnail for Lecture 3: Delay-locked loop, tunable delay line

Lecture 3: Delay-locked loop, tunable delay line

Thumbnail for Lecture 3(b): Ascertaining the type of source inside a box

Lecture 3(b): Ascertaining the type of source inside a box

Thumbnail for Lecture 3a: How can we ascertain if a source inside a black box is voltage or a current source?

Lecture 3a: How can we ascertain if a source inside a black box is voltage or a current source?

Thumbnail for Lecture 2: Derivation of Thevenin's theorem

Lecture 2: Derivation of Thevenin's theorem

Thumbnail for Lecture 1: Substitution theorem revisited

Lecture 1: Substitution theorem revisited

Thumbnail for Lecture 4: Slew rate in a 5-tansistor OTA; impedances at various nodes in a five-transistor OTA

Lecture 4: Slew rate in a 5-tansistor OTA; impedances at various nodes in a five-transistor OTA

Thumbnail for Lecture 1: Introduction & recap of MOS amplifiers (common-source, drain & gate); Differential amp.

Lecture 1: Introduction & recap of MOS amplifiers (common-source, drain & gate); Differential amp.

Thumbnail for Lecture 1: Introduction

Lecture 1: Introduction

Thumbnail for Lecture 26: Cascode configuration to increase gain; Current mirror for improved current matching

Lecture 26: Cascode configuration to increase gain; Current mirror for improved current matching

Thumbnail for Lecture 25: Timing Analysis

Lecture 25: Timing Analysis

Thumbnail for Lecture 24: Dynamic flip-flops

Lecture 24: Dynamic flip-flops

Thumbnail for Lecture 25: ICMR and common mode gain of a difamp and introduction to a two stage opamp.

Lecture 25: ICMR and common mode gain of a difamp and introduction to a two stage opamp.

Thumbnail for Lecture 24: Norton equivalent of a differential amplifier with current-mirror load

Lecture 24: Norton equivalent of a differential amplifier with current-mirror load

Thumbnail for Lecture 23: Introduction to PMOS to replace a passive resistor in a common source amplifier

Lecture 23: Introduction to PMOS to replace a passive resistor in a common source amplifier

Thumbnail for Lecture 22: CMRR in differential amplifier

Lecture 22: CMRR in differential amplifier

Thumbnail for Lecture 24 (3): Schrier Figure of Merit (FoM) for ADCs

Lecture 24 (3): Schrier Figure of Merit (FoM) for ADCs

Thumbnail for Lecture 24 (2): VCO-based ADC: basic introduction

Lecture 24 (2): VCO-based ADC: basic introduction

Thumbnail for Lecture 24 (1): Motivation for Continuous time delta-sigma modulator (CTDSM): Implicit anti-aliasing

Lecture 24 (1): Motivation for Continuous time delta-sigma modulator (CTDSM): Implicit anti-aliasing

Thumbnail for Lecture 23: Switched-capacitor loop filter; DAC mismatch; Data weighted averaging (DWA)

Lecture 23: Switched-capacitor loop filter; DAC mismatch; Data weighted averaging (DWA)

Thumbnail for Lecture 22: Timing constraints for a flipflop

Lecture 22: Timing constraints for a flipflop

Thumbnail for Lecture 21: Sequential circuits

Lecture 21: Sequential circuits

Thumbnail for Lecture 22 (pt. 2): Intuition behind the loop filter coefficients; Circuit implementation of MOD1

Lecture 22 (pt. 2): Intuition behind the loop filter coefficients; Circuit implementation of MOD1

Thumbnail for Lecture 22 (1): Delta-sigma modulator: system-level design; simple design example in MATLAB

Lecture 22 (1): Delta-sigma modulator: system-level design; simple design example in MATLAB

Thumbnail for Lecture 21: Introduction to differential amplifier

Lecture 21: Introduction to differential amplifier

Thumbnail for Lecture 20: Using current source to bias a common source amplifier

Lecture 20: Using current source to bias a common source amplifier

Thumbnail for Lecture 19: Stabilizing Miller compensated feedback network

Lecture 19: Stabilizing Miller compensated feedback network

Thumbnail for Lecture 21: Delta-sigma modulator: Higher order NTF; Maximum stable amplitude (MSA); Controlling OBG

Lecture 21: Delta-sigma modulator: Higher order NTF; Maximum stable amplitude (MSA); Controlling OBG

Thumbnail for Lecture 20: Dynamic circuits

Lecture 20: Dynamic circuits

Thumbnail for Lecture 19: MUX implementation, dynamic circuits

Lecture 19: MUX implementation, dynamic circuits

Thumbnail for Lecture 20: Noise-shaping ADC: Deriving the Error-feedback structure; Intro to delta-sigma modulator

Lecture 20: Noise-shaping ADC: Deriving the Error-feedback structure; Intro to delta-sigma modulator

Thumbnail for Lecture 19(3): Pipelined ADC: Design choices and trade-offs

Lecture 19(3): Pipelined ADC: Design choices and trade-offs

Thumbnail for Lecture 19(2): Split ADC structure for digital calibration of pipelined ADCs & time-interleaved ADCs

Lecture 19(2): Split ADC structure for digital calibration of pipelined ADCs & time-interleaved ADCs

Thumbnail for Lecture 19(1): Pipelined ADC: Digital calibration: Using a PN dither & correlation; Gradient descent

Lecture 19(1): Pipelined ADC: Digital calibration: Using a PN dither & correlation; Gradient descent

Thumbnail for Lecture 18: Stability criterion for higher order systems; introduction to phase margin

Lecture 18: Stability criterion for higher order systems; introduction to phase margin

Thumbnail for Lecture 17: Frequency response of a second order negative feedback system

Lecture 17: Frequency response of a second order negative feedback system

Thumbnail for Lecture 18: Pseudo NMOS logic, pass transistors

Lecture 18: Pseudo NMOS logic, pass transistors

Thumbnail for Lecture 17: Optimal number of stages for minimum delay, reducing logical effort

Lecture 17: Optimal number of stages for minimum delay, reducing logical effort

Thumbnail for Lecture 18: Pipelined-Flash: Multiplying DAC(MDAC) non-idealities: gain error, non-lin; DAC non-lin.

Lecture 18: Pipelined-Flash: Multiplying DAC(MDAC) non-idealities: gain error, non-lin; DAC non-lin.

Thumbnail for Lecture 16: Relating loop gain with closed loop transfer function

Lecture 16: Relating loop gain with closed loop transfer function

Thumbnail for Lecture 17: Pipelined ADC; Redundancy to tackle comparator offset; 1.5-bit (M+0.5) bit stage;

Lecture 17: Pipelined ADC; Redundancy to tackle comparator offset; 1.5-bit (M+0.5) bit stage;

Thumbnail for Lecture 16: Sizing gates for optimal delay

Lecture 16: Sizing gates for optimal delay

Thumbnail for Lecture 15: Linear delay model

Lecture 15: Linear delay model

Thumbnail for Lecture 14: Verilog

Lecture 14: Verilog

Thumbnail for Lecture 15: Effect of loop gain in a negative feedback loop

Lecture 15: Effect of loop gain in a negative feedback loop

Thumbnail for Lecture 16: SAR ADC: Loop unrolled SAR; Split C-DAC; Digital calibration; Buffer embedded SAR

Lecture 16: SAR ADC: Loop unrolled SAR; Split C-DAC; Digital calibration; Buffer embedded SAR

Thumbnail for Lecture 14: Introduction to negative feedback

Lecture 14: Introduction to negative feedback

Thumbnail for Lecture 15 (2): SAR ADC: Redundancy to tackle DAC settling; Condition for redundancy; Example calc.

Lecture 15 (2): SAR ADC: Redundancy to tackle DAC settling; Condition for redundancy; Example calc.

Thumbnail for Lecture 15 (1): Asynchronous SAR ADC; Implementing the asynchronous logic

Lecture 15 (1): Asynchronous SAR ADC; Implementing the asynchronous logic

Thumbnail for Lecture 13: Delay of combinational circuits

Lecture 13: Delay of combinational circuits

Thumbnail for Lecture 14: SAR ADC; Capacitive DAC switching schemes; Monotonic switching; Energy efficiency

Lecture 14: SAR ADC; Capacitive DAC switching schemes; Monotonic switching; Energy efficiency

Thumbnail for Lecture 12: Combinational circuits - sizing, capacitance, delay

Lecture 12: Combinational circuits - sizing, capacitance, delay

Thumbnail for Lecture 13: Intuition behind the locations of poles and zeros in a common source amplifier

Lecture 13: Intuition behind the locations of poles and zeros in a common source amplifier

Thumbnail for Lecture 12: Poles and Zeros through inspection

Lecture 12: Poles and Zeros through inspection

Thumbnail for Lecture 13: Time-interleaved ADCs; Offset, gain and timing mismatches

Lecture 13: Time-interleaved ADCs; Offset, gain and timing mismatches

Thumbnail for Lecture 11: Poles and zeros by inspection in a common source amplifier

Lecture 11: Poles and zeros by inspection in a common source amplifier

Thumbnail for Lecture 11: Ring oscillator, process variation, combinational logic

Lecture 11: Ring oscillator, process variation, combinational logic

Thumbnail for Lecture 10: Power consumption in CMOS inverter

Lecture 10: Power consumption in CMOS inverter

Thumbnail for Lecture 12(1): Flash ADC summary; Common-mode rejection in floating inverter amp FIA & integ dyn amp

Lecture 12(1): Flash ADC summary; Common-mode rejection in floating inverter amp FIA & integ dyn amp

Thumbnail for Lecture 12(2): Interpolating Flash ADC; Time interpolation in flash ADC; Some examples in literature

Lecture 12(2): Interpolating Flash ADC; Time interpolation in flash ADC; Some examples in literature

Thumbnail for Lecture 11: Flash ADC: Ref. subtraction; Dynamic premp; Offset calibration; offset as ref. for flash

Lecture 11: Flash ADC: Ref. subtraction; Dynamic premp; Offset calibration; offset as ref. for flash

Thumbnail for Lecture 9: Elmore delay model, power consumption in an inverter

Lecture 9: Elmore delay model, power consumption in an inverter

Thumbnail for Problem discussion; Deriving the Floating inverter amplifier (FIA); Dynamic amplifiers for SC ckts.

Problem discussion; Deriving the Floating inverter amplifier (FIA); Dynamic amplifiers for SC ckts.

Thumbnail for Lecture 10: Frequency characteristics of common source amplifier contd..

Lecture 10: Frequency characteristics of common source amplifier contd..

Thumbnail for Lecture 9: Frequency characteristics of a common source amplifier

Lecture 9: Frequency characteristics of a common source amplifier

Thumbnail for Lecture 10: Deriving the StrongARM latch; Introduction to Flash ADC

Lecture 10: Deriving the StrongARM latch; Introduction to Flash ADC

Thumbnail for Lecture 8: Propagation delay of a CMOS inverter

Lecture 8: Propagation delay of a CMOS inverter

Thumbnail for Lecture 9 (pt. 2):Noise in switched cap(SC) ckts with OTA; Mean-squared noise in SC ckts without OTA

Lecture 9 (pt. 2):Noise in switched cap(SC) ckts with OTA; Mean-squared noise in SC ckts without OTA

Thumbnail for Lecture 9 (pt. 1): Using an OTA vs an opamp in switched capacitor ckts; Settling & slewing with OTA

Lecture 9 (pt. 1): Using an OTA vs an opamp in switched capacitor ckts; Settling & slewing with OTA

Thumbnail for Lecture 7: Mid-point voltage and VTC of CMOS inverter

Lecture 7: Mid-point voltage and VTC of CMOS inverter

Thumbnail for Lecture 6: Delay, power and area of inverter with resistive load, CMOS inverter

Lecture 6: Delay, power and area of inverter with resistive load, CMOS inverter

Thumbnail for Lecture 8: Capacitances in MOSFET

Lecture 8: Capacitances in MOSFET

Thumbnail for Lecture 7: Channel length modulation and its effects on amplifiers

Lecture 7: Channel length modulation and its effects on amplifiers

Thumbnail for Lecture 8: Correlated double sampling (CDS); Correlated level shifting (CLS); gain error & offset

Lecture 8: Correlated double sampling (CDS); Correlated level shifting (CLS); gain error & offset

Thumbnail for Lecture 7: Charge conservation: more examples; Switched capacitor integrators (delayed & delay-free)

Lecture 7: Charge conservation: more examples; Switched capacitor integrators (delayed & delay-free)

Thumbnail for Lecture 6: Biasing a MOSFET for amplification

Lecture 6: Biasing a MOSFET for amplification

Thumbnail for Lecture 6 (pt 2): Analyzing switched capacitor ckts using KCL & understanding charge conservation

Lecture 6 (pt 2): Analyzing switched capacitor ckts using KCL & understanding charge conservation

Thumbnail for Lecture 6 (pt 1): Charge injection, bottom plate sampling, deriving the switched-capacitor amplifier

Lecture 6 (pt 1): Charge injection, bottom plate sampling, deriving the switched-capacitor amplifier

Thumbnail for Lecture 5: Inverter characteristics, inverter with resistive load

Lecture 5: Inverter characteristics, inverter with resistive load

Thumbnail for Lecture 5: Use of MOSFET as the non-linear device for amplification

Lecture 5: Use of MOSFET as the non-linear device for amplification

Thumbnail for Lecture 5: Switch non-linearity; Gate bootstrapped switch; Thermal noise

Lecture 5: Switch non-linearity; Gate bootstrapped switch; Thermal noise

Thumbnail for Lecture 4: Capacitances in MOS transistor, inverter

Lecture 4: Capacitances in MOS transistor, inverter

Thumbnail for Lecture 4: Differential & Integral non-linearity (DNL, INL); MOS as switch; Effect of finite ON res.

Lecture 4: Differential & Integral non-linearity (DNL, INL); MOS as switch; Effect of finite ON res.

Thumbnail for Lecture 3: Incremental equivalents of different electrical elements

Lecture 3: Incremental equivalents of different electrical elements

Thumbnail for Lecture 4: Introduction to incremental two port network

Lecture 4: Introduction to incremental two port network

Thumbnail for Lecture 3: Short channel effects, PMOS transistor

Lecture 3: Short channel effects, PMOS transistor

Thumbnail for Lecture 3: DFT of sinusoid; Spectral leakage; Need for windowing; Choice of input freq. to test ADC

Lecture 3: DFT of sinusoid; Spectral leakage; Need for windowing; Choice of input freq. to test ADC

Thumbnail for Lecture 2: Measuring SQNR; Refresher on Fourier analysis; Evolution of discrete Fourier transform

Lecture 2: Measuring SQNR; Refresher on Fourier analysis; Evolution of discrete Fourier transform

Thumbnail for Lecture 2: PN junction, MOS capacitor, MOS transistor, current in a MOS transistor

Lecture 2: PN junction, MOS capacitor, MOS transistor, current in a MOS transistor

Thumbnail for Lecture 1: Sampling, anti-alias filter, oversampling, reconstruction; Into to Quantization

Lecture 1: Sampling, anti-alias filter, oversampling, reconstruction; Into to Quantization

Thumbnail for Lecture 2: Linearizing a non-linear element

Lecture 2: Linearizing a non-linear element

Thumbnail for Lecture 1: Necessity of non-linearity in analog amplifiers

Lecture 1: Necessity of non-linearity in analog amplifiers

Thumbnail for An Automatic Leakage Compensation Technique for Capacitively Coupled Class-AB Operational Amplifiers

An Automatic Leakage Compensation Technique for Capacitively Coupled Class-AB Operational Amplifiers

Thumbnail for Intro to noise-shaping ADCs: Delta-sigma modulators, error-feedback noise-shaping & VCO-based ADCs

Intro to noise-shaping ADCs: Delta-sigma modulators, error-feedback noise-shaping & VCO-based ADCs

Thumbnail for Lecture 43: Critical differences of BJTs with MOSFETs and analog circuit design using BJTs

Lecture 43: Critical differences of BJTs with MOSFETs and analog circuit design using BJTs

Thumbnail for Lecture 42: Miller Compensated opamp contd..

Lecture 42: Miller Compensated opamp contd..

Thumbnail for Lecture 41: Frequency compensation of two stage opamp

Lecture 41: Frequency compensation of two stage opamp

Thumbnail for Lecture 40: Compensating a two stage amplifier by making one pole dominant.

Lecture 40: Compensating a two stage amplifier by making one pole dominant.

Thumbnail for Lecture 38: Introducing two stage amplifiers and parasitic capacitances

Lecture 38: Introducing two stage amplifiers and parasitic capacitances

Thumbnail for Lecture 37: Differential amplifier with current mirror load

Lecture 37: Differential amplifier with current mirror load

Thumbnail for Lecture 36: Common source amplifier with active load

Lecture 36: Common source amplifier with active load

Thumbnail for Lecture 39b: Role of parasitic impedances in stability of a two stage differential amplifier

Lecture 39b: Role of parasitic impedances in stability of a two stage differential amplifier

Thumbnail for Lecture 39a: Differential amplifier contd..

Lecture 39a: Differential amplifier contd..

Thumbnail for Lecture 36: Basics of analog layout, and concluding remarks

Lecture 36: Basics of analog layout, and concluding remarks

Thumbnail for Lecture 35: The method of non-linear currents or current injection to analyze weakly non-linear ckts

Lecture 35: The method of non-linear currents or current injection to analyze weakly non-linear ckts

Thumbnail for Lecture 34: CMOS inv; Class AB stage; Non-linearity in negative feedback

Lecture 34: CMOS inv; Class AB stage; Non-linearity in negative feedback

Thumbnail for Lecture 33 (pt. 2): Scaling in analog circuits: Noise/impedance scaling and frequency scaling

Lecture 33 (pt. 2): Scaling in analog circuits: Noise/impedance scaling and frequency scaling

Thumbnail for Lecture 33 (pt. 1): Noise & offset in multi-stage amps; Noise & SNR in fully differential circuits

Lecture 33 (pt. 1): Noise & offset in multi-stage amps; Noise & SNR in fully differential circuits

Thumbnail for Lecture 32 (errata): Noise calculation

Lecture 32 (errata): Noise calculation

Thumbnail for Lecture 32: Input ref. noise & offset in 5-transistor OTA, telescopic cascode, folded cascode OTA

Lecture 32: Input ref. noise & offset in 5-transistor OTA, telescopic cascode, folded cascode OTA

Thumbnail for Lecture 34: Relating a differential amplifier in feedback to a classical negative feedback topology

Lecture 34: Relating a differential amplifier in feedback to a classical negative feedback topology

Thumbnail for Lecture 35: Introducing a PMOSFET to realize a gain stage

Lecture 35: Introducing a PMOSFET to realize a gain stage

Thumbnail for Lecture 31: Input referred noise calc with eg.; Input referred noise of a MOSFET; noise in a cascode

Lecture 31: Input referred noise calc with eg.; Input referred noise of a MOSFET; noise in a cascode

Thumbnail for Lecture 33: Synthesis of a differential amplifier to realize an error amplifier in a feedback loop.

Lecture 33: Synthesis of a differential amplifier to realize an error amplifier in a feedback loop.

Thumbnail for Lecture 32: Synthesis of a stable gain network using negative feedback

Lecture 32: Synthesis of a stable gain network using negative feedback

Thumbnail for Lecture 31: Effect of channel length modulation on current mirrors

Lecture 31: Effect of channel length modulation on current mirrors

Thumbnail for Lecture 30: Use of a current buffer to improve voltage gain; Introduction to body effect

Lecture 30: Use of a current buffer to improve voltage gain; Introduction to body effect

Thumbnail for Lecture 29: Channel length modulation in MOSFET

Lecture 29: Channel length modulation in MOSFET

Thumbnail for Lecture 30: Noise in MOSFETs; Input referred noise voltage and current; Noise calc. in CS & CG amp.

Lecture 30: Noise in MOSFETs; Input referred noise voltage and current; Noise calc. in CS & CG amp.

Thumbnail for Lecture 29: Mismatch in current mirror; Intro to noise; Power spectral density; Noise in resistors

Lecture 29: Mismatch in current mirror; Intro to noise; Power spectral density; Noise in resistors

Thumbnail for Lecture 28: Resistors and capacitors on ICs; Random mismatch; Process variations; Pelgrom's law

Lecture 28: Resistors and capacitors on ICs; Random mismatch; Process variations; Pelgrom's law

Thumbnail for Lecture-18: Introduction to oscillators

Lecture-18: Introduction to oscillators

Thumbnail for Lecture 27: Biasing a transistor with current sources contd..

Lecture 27: Biasing a transistor with current sources contd..

Thumbnail for Lecture 28: Synthesis of current controlled current source- Common Gate configuration

Lecture 28: Synthesis of current controlled current source- Common Gate configuration

Thumbnail for Lecture 27: Long recap; Common-mode rejection with CMFB; Output impedance with negative feedback

Lecture 27: Long recap; Common-mode rejection with CMFB; Output impedance with negative feedback

Thumbnail for Lecture 26: 2-stage fully-diff. Miller OTA, CMFB choices; fully diff. 2-stage feedforward OTA & CMFB

Lecture 26: 2-stage fully-diff. Miller OTA, CMFB choices; fully diff. 2-stage feedforward OTA & CMFB

Thumbnail for Lecture 17: Phase noise, jitter in inverter, delay line and ring oscillator (qualitative analysis)

Lecture 17: Phase noise, jitter in inverter, delay line and ring oscillator (qualitative analysis)

Thumbnail for Lecture 16: Relationship between phase noise PSD and clock signal PSD; reporting phase noise

Lecture 16: Relationship between phase noise PSD and clock signal PSD; reporting phase noise

Thumbnail for Lecture 15: Characterizing jitter, relationship between jitter and phase noise, jitter PSD

Lecture 15: Characterizing jitter, relationship between jitter and phase noise, jitter PSD

Thumbnail for Lecture 14: Noise review, introduction to phase noise and jitter, jitter definitions

Lecture 14: Noise review, introduction to phase noise and jitter, jitter definitions

Thumbnail for Lecture 13: Type-II DLL, DLL applications, noise review

Lecture 13: Type-II DLL, DLL applications, noise review

Thumbnail for Lecture 12: Discrete time model for the DLL

Lecture 12: Discrete time model for the DLL

Thumbnail for Lecture 11: Small signal analysis of DLL (Open and closed loop transfer functions)

Lecture 11: Small signal analysis of DLL (Open and closed loop transfer functions)

Thumbnail for Lecture 10: Small signal phase domain model of the DLL

Lecture 10: Small signal phase domain model of the DLL

Thumbnail for Lecture 25: CMFB variants: source follower + res. CMD, MOS-based CMD, replica biasing, etc.

Lecture 25: CMFB variants: source follower + res. CMD, MOS-based CMD, replica biasing, etc.

Thumbnail for Lecture 26: Biasing a transistor by pushing current into the drain tweaking the source

Lecture 26: Biasing a transistor by pushing current into the drain tweaking the source

Thumbnail for Lecture 25: Introduction to current mirrors to bias a transistor with constant current

Lecture 25: Introduction to current mirrors to bias a transistor with constant current

Thumbnail for Lecture 24: Need for common-mode feedback (CMFB); CMFB variants using resistive common-mode detector

Lecture 24: Need for common-mode feedback (CMFB); CMFB variants using resistive common-mode detector

Thumbnail for Lecture 23: Motivation for differential signaling; pseudo-differential vs. fully differential ckts.

Lecture 23: Motivation for differential signaling; pseudo-differential vs. fully differential ckts.

Thumbnail for Lecture 23: Pipelined ADC: redundancy (contd.), and residue amp. non-idealities

Lecture 23: Pipelined ADC: redundancy (contd.), and residue amp. non-idealities

Thumbnail for Lecture 25: Pipelined ADC: digital calibration of DAC mismatch

Lecture 25: Pipelined ADC: digital calibration of DAC mismatch

Thumbnail for Lecture 24: Deriving the circuit implementation of a pipelined ADC

Lecture 24: Deriving the circuit implementation of a pipelined ADC

Thumbnail for Lecture 20 (pt. 2): Time interleaved ADCs, non-idealities and calibration

Lecture 20 (pt. 2): Time interleaved ADCs, non-idealities and calibration

Thumbnail for Lecture 21: Multi-step ADCs

Lecture 21: Multi-step ADCs

Thumbnail for Lecture 20 (pt. 1): Dynamic preamplifiers; Improving flash ADC resolution: interpolation and folding

Lecture 20 (pt. 1): Dynamic preamplifiers; Improving flash ADC resolution: interpolation and folding

Thumbnail for Lecture 22: Pipelined ADC, redundancy to tackle ADC non-idealities

Lecture 22: Pipelined ADC, redundancy to tackle ADC non-idealities

Thumbnail for Lecture 24: Source follower architecture

Lecture 24: Source follower architecture

Thumbnail for Lecture 22: Constant current biasing; diode connected transistor

Lecture 22: Constant current biasing; diode connected transistor

Thumbnail for Lecture 23: Constant current bias, by applying current at the source; evolution of a voltage buffer

Lecture 23: Constant current bias, by applying current at the source; evolution of a voltage buffer

Thumbnail for Lecture 21: Bode plot for common source amplifier; Introduction to constant current biasing.

Lecture 21: Bode plot for common source amplifier; Introduction to constant current biasing.

Thumbnail for Lecture 22: Lookup table based systematic design of analog circuits (gm/Id based design)

Lecture 22: Lookup table based systematic design of analog circuits (gm/Id based design)

Thumbnail for Lecture 21: Feedforward compensation; Comparing Miller and feedforward compensation

Lecture 21: Feedforward compensation; Comparing Miller and feedforward compensation

Thumbnail for Lecture 20: Midsem quiz discussion; Nested Miller compensation

Lecture 20: Midsem quiz discussion; Nested Miller compensation

Thumbnail for Lecture 18: Comparators: Regenerative latch; Strong-arm latch; Offset in latches

Lecture 18: Comparators: Regenerative latch; Strong-arm latch; Offset in latches

Thumbnail for Lecture 19: Latch offset correction: auto-zeroing and calibration

Lecture 19: Latch offset correction: auto-zeroing and calibration

Thumbnail for Lecture 16: Settling (contd.); Noise in switched-capacitor circuits

Lecture 16: Settling (contd.); Noise in switched-capacitor circuits

Thumbnail for Lecture 17: The switched-capacitor integrator

Lecture 17: The switched-capacitor integrator

Thumbnail for Lecture 15: Settling in switched-capacitor circuits with an OTA

Lecture 15: Settling in switched-capacitor circuits with an OTA

Thumbnail for Lecture 13: Hold-mode feedthrough; Charge injection; Bottom-plate sampling

Lecture 13: Hold-mode feedthrough; Charge injection; Bottom-plate sampling

Thumbnail for Lecture 12: Thermal noise (contd.); Clock jitter and signal dependent sampling

Lecture 12: Thermal noise (contd.); Clock jitter and signal dependent sampling

Thumbnail for Lecture 14: Deriving the switched-capacitor amplifier using Miller effect

Lecture 14: Deriving the switched-capacitor amplifier using Miller effect

Thumbnail for Lecture 15 (erratum) in swing limits

Lecture 15 (erratum) in swing limits

Thumbnail for Lecture 11: Intro to thermal noise; thermal noise during sampling

Lecture 11: Intro to thermal noise; thermal noise during sampling

Thumbnail for Lecture 1: Introduction

Lecture 1: Introduction

Thumbnail for Lecture 19 (pt. 1): Two-stage Miler compensated OTA: Design example #2

Lecture 19 (pt. 1): Two-stage Miler compensated OTA: Design example #2

Thumbnail for Lecture 18: Ahuja compensation; Using the zero cancelling resistor; Miller OTA design example #1

Lecture 18: Ahuja compensation; Using the zero cancelling resistor; Miller OTA design example #1

Thumbnail for Lecture 17: Miller OTA: Eliminating RHP zero; source follower (VCVS); zero cancelling resistor

Lecture 17: Miller OTA: Eliminating RHP zero; source follower (VCVS); zero cancelling resistor

Thumbnail for Lecture 20: Using coupling capacitor to drive a load without affecting bias points

Lecture 20: Using coupling capacitor to drive a load without affecting bias points

Thumbnail for Lecture 19: Finding the component values to bias a the input of a common source amplifier

Lecture 19: Finding the component values to bias a the input of a common source amplifier

Thumbnail for Lecture 18: Replacing a battery with a capacitor to bias a common source amplifier

Lecture 18: Replacing a battery with a capacitor to bias a common source amplifier

Thumbnail for Lecture 9: Gate-switched charge pump, mismatches, modelling the DLL

Lecture 9: Gate-switched charge pump, mismatches, modelling the DLL

Thumbnail for Lecture 8: Charge pump implementation

Lecture 8: Charge pump implementation

Thumbnail for Lecture 7: Locking nonidealities: False locking, harmonic locking, SPO

Lecture 7: Locking nonidealities: False locking, harmonic locking, SPO

Thumbnail for Lecture 6: Locking in a DLL

Lecture 6: Locking in a DLL

Thumbnail for Lecture 5: SR latch based PD, PFD

Lecture 5: SR latch based PD, PFD

Thumbnail for Lecture 4: Variable delay lines, Phase detectors - Multiplier, S&H, XOR

Lecture 4: Variable delay lines, Phase detectors - Multiplier, S&H, XOR

Thumbnail for Lecture 13: Impedance/admittance conversion matrix of LPTV systems

Lecture 13: Impedance/admittance conversion matrix of LPTV systems

Thumbnail for Lecture 16: 2-stage Miller OTA; design iteration eg., transistor-level schematic; Systematic offset

Lecture 16: 2-stage Miller OTA; design iteration eg., transistor-level schematic; Systematic offset

Thumbnail for Lecture 15: Two-stage Miller compensated OTA; Phase margin vs. time-domain response in closed loop

Lecture 15: Two-stage Miller compensated OTA; Phase margin vs. time-domain response in closed loop

Thumbnail for Lecture 14 (part 2): Arriving at Miller and feed-forward compensation through root locus

Lecture 14 (part 2): Arriving at Miller and feed-forward compensation through root locus

Thumbnail for Lecture 14 (part 1): Effect of poles and zeros: time-domain intuition

Lecture 14 (part 1): Effect of poles and zeros: time-domain intuition

Thumbnail for Lecture 17: Biasing a common source amplifier for maximum input swing

Lecture 17: Biasing a common source amplifier for maximum input swing

Thumbnail for Lecture 16: Swing limits in a common source amplifier

Lecture 16: Swing limits in a common source amplifier

Thumbnail for Lecture 15: Synthesis of an amplifier while taking biasing into account

Lecture 15: Synthesis of an amplifier while taking biasing into account

Thumbnail for Lecture 14: Use of MOSFET in saturation region for amplification

Lecture 14: Use of MOSFET in saturation region for amplification

Thumbnail for Lecture 3: Variable delay lines

Lecture 3: Variable delay lines

Thumbnail for Lecture 2: Flash TDC, PVT variation, Introduction to DLL

Lecture 2: Flash TDC, PVT variation, Introduction to DLL

Thumbnail for Lecture 1: Introduction

Lecture 1: Introduction

Thumbnail for Lecture 9: Sampling switch implementation; non-idealities: finite ON resistance

Lecture 9: Sampling switch implementation; non-idealities: finite ON resistance

Thumbnail for Lecture 8: ADC performance metrics (part 2); Integral and differential non-linearity (INL and DNL)

Lecture 8: ADC performance metrics (part 2); Integral and differential non-linearity (INL and DNL)

Thumbnail for Lecture 10: Gate bootstrapped switch (two variants)

Lecture 10: Gate bootstrapped switch (two variants)

Thumbnail for Lecture 7: ADC performance metrics (part 1); signal to noise ratio variants: SQNR, SNR, SNDR

Lecture 7: ADC performance metrics (part 1); signal to noise ratio variants: SQNR, SNR, SNDR

Thumbnail for Lecture 6: Measuring SQNR (part 3): Windowing the DFT/FFT; Rectangular & raised-cosine windows

Lecture 6: Measuring SQNR (part 3): Windowing the DFT/FFT; Rectangular & raised-cosine windows

Thumbnail for Lecture 5: Measuring SQNR (part 2); Basics of discrete Fourier transform (DFT)

Lecture 5: Measuring SQNR (part 2); Basics of discrete Fourier transform (DFT)

Thumbnail for Lecture 6 (addendum): Time domain explanation for using windowing functions in DFT/FFT

Lecture 6 (addendum): Time domain explanation for using windowing functions in DFT/FFT

Thumbnail for Lecture 13: Using root locus to derive stability conditions (phase margin); LHP zeros vs. stability

Lecture 13: Using root locus to derive stability conditions (phase margin); LHP zeros vs. stability

Thumbnail for Lecture 11: Miller effect; intuition behind pole locations; poles and zeroes in 5-transistor OTA

Lecture 11: Miller effect; intuition behind pole locations; poles and zeroes in 5-transistor OTA

Thumbnail for Lecture 12: Poles and zeros in telescopic cascode OTA; multi-stage OTAs, stability in neg. feedback

Lecture 12: Poles and zeros in telescopic cascode OTA; multi-stage OTAs, stability in neg. feedback

Thumbnail for Lecture 12: Introduction to MOSFET structure

Lecture 12: Introduction to MOSFET structure

Thumbnail for Lecture 11: Introduction to MOS structure

Lecture 11: Introduction to MOS structure

Thumbnail for Lecture 13: Introduction to I-V characteristics of in a MOSFET, and its relation with y-parameters

Lecture 13: Introduction to I-V characteristics of in a MOSFET, and its relation with y-parameters

Thumbnail for Lecture 4: Measuring SQNR (part 1) using the power sp

Lecture 4: Measuring SQNR (part 1) using the power sp

Thumbnail for Lecture 3: Quantization, mid-rise, mid-tread, signal-to-quantization-noise ratio (SQNR)

Lecture 3: Quantization, mid-rise, mid-tread, signal-to-quantization-noise ratio (SQNR)

Thumbnail for Lecture 9: Necessary y-parameter conditions for amplification

Lecture 9: Necessary y-parameter conditions for amplification

Thumbnail for Lecture 10: An elementary introduction to physics of semiconductor devices; PN junction diode

Lecture 10: An elementary introduction to physics of semiconductor devices; PN junction diode

Thumbnail for Lecture 10: Poles and zeros; Common-source amp; Miller effect; (extra info: unobservable state eg.)

Lecture 10: Poles and zeros; Common-source amp; Miller effect; (extra info: unobservable state eg.)

Thumbnail for Lecture 8: Proof of reciprocity theorem; introduction to two-port network

Lecture 8: Proof of reciprocity theorem; introduction to two-port network

Thumbnail for Lecture 7: Network theory; Thevenin's theorem, source substitution, Tellegen's theorem

Lecture 7: Network theory; Thevenin's theorem, source substitution, Tellegen's theorem

Thumbnail for Lecture 6: Network theory; revisiting KCL, KVL, substitution theorem

Lecture 6: Network theory; revisiting KCL, KVL, substitution theorem

Thumbnail for Lecture 5: Requirement of non-linearity for power amplification

Lecture 5: Requirement of non-linearity for power amplification

Thumbnail for Lecture 9: Finding zeros by inspection; Source follower: poles and zeros

Lecture 9: Finding zeros by inspection; Source follower: poles and zeros

Thumbnail for Lecture 7: Folded cascode: pMOS variant and slew rate

Lecture 7: Folded cascode: pMOS variant and slew rate

Thumbnail for Lecture 8: Gain-boosted cascode and its swing limits

Lecture 8: Gain-boosted cascode and its swing limits

Thumbnail for Lecture 6: Folded cascode opamp; gain and swing limits

Lecture 6: Folded cascode opamp; gain and swing limits

Thumbnail for Lecture 5: Telescopic cascode opamp; Swing limits and biasing

Lecture 5: Telescopic cascode opamp; Swing limits and biasing

Thumbnail for Lecture 4: Can an LTI network generate power gain?

Lecture 4: Can an LTI network generate power gain?

Thumbnail for Lecture 3: Relating the small signal equivalent to the tangent of the I-V characteristics

Lecture 3: Relating the small signal equivalent to the tangent of the I-V characteristics

Thumbnail for Lecture 2: Relating incremental model of a diode with its operating point.

Lecture 2: Relating incremental model of a diode with its operating point.

Thumbnail for Lecture 1: Use of Taylor series to deal with devices having non-linear I-V characteristics

Lecture 1: Use of Taylor series to deal with devices having non-linear I-V characteristics

Thumbnail for Lecture 4: Telescopic cascode opamp, its small -signal gain and slew rate

Lecture 4: Telescopic cascode opamp, its small -signal gain and slew rate

Thumbnail for Lecture 3: Input and output common mode range & slew rate in 5-transistor differential amplifier

Lecture 3: Input and output common mode range & slew rate in 5-transistor differential amplifier

Thumbnail for Lecture 2: Sampling recap, oversampling, subsampling, and signal reconstruction from its samples

Lecture 2: Sampling recap, oversampling, subsampling, and signal reconstruction from its samples

Thumbnail for Lecture 2: Differential pair with active load and current mirror load (recap)

Lecture 2: Differential pair with active load and current mirror load (recap)

Thumbnail for Lecture 1: Introduction and basics of sampling

Lecture 1: Introduction and basics of sampling

Thumbnail for Lecture 1: Recap of basic MOS amplifiers

Lecture 1: Recap of basic MOS amplifiers

Thumbnail for Lecture 26: Stability analysis in two stage Miller compensated opamp

Lecture 26: Stability analysis in two stage Miller compensated opamp

Thumbnail for Lecture 25: Nyquist criterion and relationship with stability in all-pole systems

Lecture 25: Nyquist criterion and relationship with stability in all-pole systems

Thumbnail for Lecture 24: S-parameters; Vector network analyzer; Stability in negative feedback systems with zeros

Lecture 24: S-parameters; Vector network analyzer; Stability in negative feedback systems with zeros

Thumbnail for Lecture 23: Maximum power transfer; Need for S-parameters; Example problems

Lecture 23: Maximum power transfer; Need for S-parameters; Example problems

Thumbnail for Lecture 22: Laplace transform based analysis of transmission line; input impedance; reflection coeff

Lecture 22: Laplace transform based analysis of transmission line; input impedance; reflection coeff

Thumbnail for Lecture 21: Mean-squared noise in LPTV networks with RLC and switches; Intro to transmission lines

Lecture 21: Mean-squared noise in LPTV networks with RLC and switches; Intro to transmission lines

Thumbnail for Lecture 20: Inter-reciprocity eg. Chopping; LPTV network with sampled output; Noise in LPTV circuits

Lecture 20: Inter-reciprocity eg. Chopping; LPTV network with sampled output; Noise in LPTV circuits

Thumbnail for Lecture 19: Inter-reciprocity relation in time domain based on impulse response & signal flow graphs

Lecture 19: Inter-reciprocity relation in time domain based on impulse response & signal flow graphs

Thumbnail for Lecture 18: Using conversion matrices to prove inter-reciprocity in LPTV networks

Lecture 18: Using conversion matrices to prove inter-reciprocity in LPTV networks

Thumbnail for Lecture 17: Nyquist noise theorem and Bode's noise theorem in linear time invariant networks

Lecture 17: Nyquist noise theorem and Bode's noise theorem in linear time invariant networks

Thumbnail for Lecture 24: Introduction of stability issues in multi-pole architectures

Lecture 24: Introduction of stability issues in multi-pole architectures

Thumbnail for Lecture 23: Swing limits in an opamp in negative feedback

Lecture 23: Swing limits in an opamp in negative feedback

Thumbnail for Lecture 21: PSRR in differential pairs

Lecture 21: PSRR in differential pairs

Thumbnail for Lecture 22: PSRR in difamp in negative feedback

Lecture 22: PSRR in difamp in negative feedback

Thumbnail for Lecture 20: Diffamp with current mirror load

Lecture 20: Diffamp with current mirror load

Thumbnail for Lecture19: Active loads using PMOS; Inverters as amplifiers

Lecture19: Active loads using PMOS; Inverters as amplifiers

Thumbnail for Lecture 16: Reciprocity and inter-reciprocity in linear time-invariant (LTI) networks

Lecture 16: Reciprocity and inter-reciprocity in linear time-invariant (LTI) networks

Thumbnail for Lecture18: Current mirrors

Lecture18: Current mirrors

Thumbnail for Lecture 15: Assignment soln; Tellegen's theorem, its extensions; Reciprocity theorem with resistors.

Lecture 15: Assignment soln; Tellegen's theorem, its extensions; Reciprocity theorem with resistors.

Thumbnail for Lecture17: Input common mode range (ICMR) and common mode rejection ratio (CMRR) in diffamp.

Lecture17: Input common mode range (ICMR) and common mode rejection ratio (CMRR) in diffamp.

Thumbnail for Lecture 14: Harmonic transfer matrix; Conversion matrix-based analysis of LPTV ckts; Intro to noise

Lecture 14: Harmonic transfer matrix; Conversion matrix-based analysis of LPTV ckts; Intro to noise

Thumbnail for Lecture16: Introduction to differential amplifier

Lecture16: Introduction to differential amplifier

Thumbnail for Lecture15: Biasing using constant current source into drain and feedback at source

Lecture15: Biasing using constant current source into drain and feedback at source

Thumbnail for Lecture14: Constant current biasing contd..

Lecture14: Constant current biasing contd..

Thumbnail for Lecture 12: Differential N-path filter; B.W. calculation; Passive Mixers; N-path filter+Mixer combo

Lecture 12: Differential N-path filter; B.W. calculation; Passive Mixers; N-path filter+Mixer combo

Thumbnail for Lecture13: Amplifier design with constant current biasing.

Lecture13: Amplifier design with constant current biasing.

Thumbnail for Lecture12 Errata: Correction of swing limits in lecture 12

Lecture12 Errata: Correction of swing limits in lecture 12

Thumbnail for Lecture 10: N-path/Segmented chopping; Time-interleaved sampling

Lecture 10: N-path/Segmented chopping; Time-interleaved sampling

Thumbnail for Lecture 11: N-path bandpass filter; deriving the N-path filter, HTFs for the 4-path filter

Lecture 11: N-path bandpass filter; deriving the N-path filter, HTFs for the 4-path filter

Thumbnail for Lecture12: Swing limits continued.

Lecture12: Swing limits continued.

Thumbnail for Lecture11: Swing limitations and maximum gain in a common source amplifier; Intro to cascode stage

Lecture11: Swing limitations and maximum gain in a common source amplifier; Intro to cascode stage

Thumbnail for Lecture 9: Deriving the N-path principle; N-path LPTV systems; Multi-phase Buck converter

Lecture 9: Deriving the N-path principle; N-path LPTV systems; Multi-phase Buck converter

Thumbnail for Lecture10: Effect of loading while breaking a loop.

Lecture10: Effect of loading while breaking a loop.

Thumbnail for Lecture 8: Basics of periodic steady-state (pss), pac and pxf simulation demos in Cadence SpectreRF

Lecture 8: Basics of periodic steady-state (pss), pac and pxf simulation demos in Cadence SpectreRF

Thumbnail for Lecture9: Evaluation of Closed loop response from L(s)

Lecture9: Evaluation of Closed loop response from L(s)

Thumbnail for Lecture 8: Steady state errors and sinusoidal excitation in negative feedback

Lecture 8: Steady state errors and sinusoidal excitation in negative feedback

Thumbnail for Lecture 6: Bandwidth of the switched RC filter variants; impulse response of linear systems

Lecture 6: Bandwidth of the switched RC filter variants; impulse response of linear systems

Thumbnail for Lecture 7: LPTV systems: Zadeh expansion, harmonic transfer functions of the LPTV bandpass filter

Lecture 7: LPTV systems: Zadeh expansion, harmonic transfer functions of the LPTV bandpass filter

Thumbnail for Lecture7: Impact of error injection in a negative feedback loop with an integrator.

Lecture7: Impact of error injection in a negative feedback loop with an integrator.

Thumbnail for Lecture 5: Variants of the switched RC filter

Lecture 5: Variants of the switched RC filter

Thumbnail for Lecture6: Introduction to negative feedback, with integrator in the loop.

Lecture6: Introduction to negative feedback, with integrator in the loop.

Thumbnail for Lecture5: Synthesis of controlled sources using negative feedback

Lecture5: Synthesis of controlled sources using negative feedback

Thumbnail for Lecture 4: MOSFET regions, and small signal parameters.

Lecture 4: MOSFET regions, and small signal parameters.

Thumbnail for Lecture 3: Low drop-out (LDO) regulators, basics of switching regulator (Buck DC-DC converter)

Lecture 3: Low drop-out (LDO) regulators, basics of switching regulator (Buck DC-DC converter)

Thumbnail for Lecture 2: Bandgap reference, introduction to voltage regulators

Lecture 2: Bandgap reference, introduction to voltage regulators

Thumbnail for Lecture 1: Course overview, and introduction to bandgap reference

Lecture 1: Course overview, and introduction to bandgap reference

Thumbnail for Lecture2 - Linearizing a non-linear element

Lecture2 - Linearizing a non-linear element

Thumbnail for Lecture1: Voltage divider - loading effect

Lecture1: Voltage divider - loading effect

Thumbnail for Breaking the Tradeoff between Bandwidth and Close-in Blocker Attenuation in an N-path Filter

Breaking the Tradeoff between Bandwidth and Close-in Blocker Attenuation in an N-path Filter

Thumbnail for Bandwidth-enhanced Feed-forward Amplifier with Shared Class-AB Gain and Compensation Paths

Bandwidth-enhanced Feed-forward Amplifier with Shared Class-AB Gain and Compensation Paths

Thumbnail for Analysis and comparison of distortion of Miller and feed-forward opamps in negative feedback

Analysis and comparison of distortion of Miller and feed-forward opamps in negative feedback